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Board Level Drop Test Failure Analysis of Ball Grid Array Packages
Greg Heaslip, Claire Ryan, Bryan Rodgers, and Jeff Punch
Stokes Research Institute
University of Limerick,
Limerick, Ireland
Tel./Fax: +353-61-202471/2393
Email: greg.heaslip@ul.ie
Abstract
In the past decade or so it has become evident that a large percentage of failures which afflict portable electronic
products is due to impact or shock during use. Failures of the external housing, internal electronic components,
package-to-board interconnects, and liquid crystal display panels may occur as the result of dropping. Moreover,
the introduction of lead-free solder to the electronics industry will bring additional design implications for future
generations of mobile information and communication technology (ICT) applications. In this paper, drop tests
carried out on printed circuit boards (PCBs) mounted with ball grid arrays (BGAs) are detailed. Electrical
continuity through each package is monitored during the impact event in order to detect failure of package-to-board
interconnects. Life distributions are established for both lead-free and eutectic solders for various drop heights.
Also, interconnect failure analysis is carried out on both solders and a qualitative comparison is made. The life test
data presented in this paper suggests that for board level drop testing different failure mechanisms can occur at
different stress levels. Moreover, it is evident that there is a considerable difference between lead-free solder life
expectancy and eutectic solder life expectancy.
Introduction
With the recent growth in development of mobile
consumer electronics has come a unique set of
reliability issues that are associated with portable
products and their use environment. Mobile products
may be subjected to severe environmental conditions
during use. In particular, accidental dropping is
believed to cause substantial damage to vulnerable
components, such as liquid crystal displays, solder
joints, and shield housing. Wu et al. 1 stated that
failure due to drop impact is one of the most
prevalent failure modes of portable
telecommunications products. The impending
enforcement of the WEEE and RoHS legislation in
Europe and increasing market pressures to replace
lead based solder in electronic products has resulted
in research being carried out in many areas related to
lead-free solder. However, the subject of drop testing
has featured few publications.
match. Wong et al 11 carried out a parametric study of
board level drop testing using the explicit FE method
without experimental validation. Luan et al 12
analyzed dynamic resistance of a solder joint during
the drop event. Tee et al 13-14 analyzed lead-free and
eutectic solder in board level drop testing using the
explicit FE method. Tee proposed a stress-life model
for the failure data, however, the use of only four
data points limited this investigation.
The objectives of the work presented in this paper are
as follows;
• To compare the performance of eutectic
solder with that of lead-free solder, in board
level drop testing.
• To understand the failure mechanisms
occuring, as a result of drop or impact, at the
solder interface with the board or
component.
Research in the area of drop testing in general has
been addressed analytically in several papers. Suhir 2-6
has analyzed drop and shock testing, enclosed
elements in portable electronics, and nonlinear
response of printed circuit boards (PCBs). Goyal et
al. 7-8 analyzed the dynamics of clattering that occurs
at the point of impact to a free falling object, and
Goyal et al. 9 reviewed the shock response spectrum
(SRS) and damage boundary methods for product
evaluation and design.
In order to achieve these goals a test vehicle was
subjected to a series of drop tests. In the first section
of this paper the experimental set-up, the printed
circuit board (PCB), and the ball grid arrays (BGAs)
are described. Results from life tests, strain tests and
resistance tests are then described, followed by
results from the failure analysis.
Experimentation
A test vehicle consisting of a PCB mounted in a
metal fixture was used for testing. The PCB was
made of FR4 material and 1.6mm thick, 160mm long
and 100mm wide. The PCB was populated with four
(BGA) test packages, evenly spaced across the width
Board level drop testing carried out by Hirata et al 10
used the implicit finite element (FE) method but
found that experimentation and simulation did not
of the board at the mid-section in a similar fashion to
the JEDEC standard JESD22-B111 15 , as shown in
Figure 1. The packages used were the Amkor
Technology ChipArray ® BGA (A-CABGA100-
.8mm-10mm). These are a 10 x 10 full array chip.
The BGAs were faced downwards during testing.
This test vehicle was then placed onto the mounting
section of an MTS 845.99 Impac free fall drop-test
system. This is shown in Figure 3.
detector. Table 1 shows the number and type of
boards tested at each drop height.
Figure 1: PCB layout.
Figure 3: Daisy-chain layout for the life tests.
Each chip had five sets of daisy-chained solder
connections, each of which formed one continuous
connection, through which a constant current of
300µA was passed. The daisy-chains are illustrated
in Figure 3, where the dotted lines highlight the path
of the daisy chain. During the life tests, the resistance
through each daisy-chain was continuously
monitored using an Analysis Tech 128STD Event
Detector System. When this resistance exceeded a
threshold value of 300 Ω, a failure was registered for
that particular daisy chain.
Table 1: Number of boards tested at each drop
height
Drop Height
(mm)
Number of Tin-
Lead Boards
Tested
Number of
Lead-Free
Boards Tested
813
2
-
610
2
2
406
2
2
203
-
2
Two types of failures were recorded during
testing; soft failures and hard failures.
• Soft failures are those where a failure was
registered during the drop event only. When a
soft failure occurred, the daisy chain
resistance exceeded the threshold value during
the drop event and then returned below the
threshold value when the drop event was over.
• Hard failures are those where the resistance
through the daisy chain did not return below
the threshold value after the drop event ended.
Figure 2: Test vehicle located on the drop table
In further testing of the lead-free boards, a
Measurements Group (CEA-06-125-UT-350) strain
gage was attached to a board in order to measure the
strain along the longitudinal axis during impact. It
was located on the solder side of the PCB (opposite
side to the components), 65mm from the end of the
board and 20mm from the side. An identical strain
gage was used for temperature compensation. The
gages were setup in a half bridge with a Fylde bridge
amplifier type FE-359-TA. This voltage
measurement was then acquired at a rate of 5kHz
using a D-Space data acquisition system. The
A total of twelve boards were used: six of these had
tin-lead solder (63Sn37Pb with Kester paste K256)
connections; and the remaining six had lead-free
solder (Sn95.5Ag3.8Cu0.7 with Kester paste R910)
connections. Each board was then tested individually
whereby they were sequentially placed into the
fixture, which was then mounted onto the drop table.
Each daisy chain was then connected to the event
800281.016.png 800281.017.png 800281.018.png
experimental set-up for the strain test is illustrated in
Figure 6.
Failure analysis of the BGA interconnections was
carried out by, firstly, encapsulating each package in
a clear epoxy. Then, using a series of grinding
techniques, material was removed until a cross-
section of the solder interconnect was visible. The
section was polished and then photographed at 10X,
20X and 50X magnification.
In order to gain a better understanding of the failure
process resistance tests were carried out. On another
seven lead-free test boards, a constant current source
was connected through two solder joints and the
voltage required to maintain this current gave a
measure of the resistance through the joints during
the impact event. The two solder connections that
were monitored are highlighted in Figure 4 as the two
connections in the top right hand corner with the
dotted line passing through them.
Results and Discussion
In this section four sets of results are presented. The
life test results are presented first followed by strain
measurements. The third set of results presents the
resistance measurements and the corresponding
failure analysis. The last set of results shows a
comparison of failure analysis of lead-free solder
BGA connections with tin-lead solder BGA
connections.
Life Test Results
In this section, two sets of data are presented; number
of drops to “hard failure” and number of drops to
“soft failure”. Further analysis of this data was
carried out using Weibull++ Version 6 reliability
software. The results from this analysis are also
presented here.
300
Lead Free Solder
Figure 4: Daisy chain layout for resistance
measurement.
250
Tin Lead Solder
This voltage and the strain measurements were then
acquired at a rate of 5kHz with a D-Space data
acquisition system. The experimental set-up for the
strain and resistance test is illustrated in Figure 5.
200
150
100
50
0
0
200
400
600
800
1000
Drop Height (mm)
Figure 5: Strain and resistance test set-up
Figure 6: Number of drops to “Hard Failure”
Furthermore, in a separate test, two boards were
subjected to 100 drops from a height of 610 mm.
One of these boards contained lead-free solder and
the other contained tin-lead solder. Failure analysis
was then carried out on each solder ball from each
chip and a comparison was made between the two.
Figures 6 and 7 show the number of drops to “hard”
and “soft” failure of both lead-free and tin-lead
solder interconnects respectively. It can be seen
clearly from these graphs that the lead-free solder
requires fewer drops to failure than the tin-lead
solder. Analysis of the failure data showed that the
800281.019.png 800281.001.png 800281.002.png 800281.003.png
data, at some stress levels may be represented by the
Weibull distribution.
The 2-parameter Weibull distribution is given by,
Figure 8: Weibull probability plot of drops to
“Soft Failure” of lead-free interconnects.
⎛
D
⎞
β
β
1
−
⎜
⎝
⎟
⎠
β
⎛
D
⎞
()
η
f
D
=
⎜
⎝
⎟
⎠
e
η
η
where,
β = shape parameter or slope
η = scale parameter
D = number of drops
This is the basis of the theory used in the Weibull++
software 16 to determine life characteristics of
reliability test data.
300
Lead Free Solder
Tin Lead Solder
Figure 9: Weibull probability plot of drops to
“Soft Failure” of tin-lead interconnects.
250
200
Table 2. Results from Weibull analysis of “Soft
Failures”
Lead-Free Analysis
Drop
Height
β η ρ'
150
610mm
1.45
7.0
0.94
406mm
1.70
47.0
0.95
100
203mm
4.07
260.0
0.97
Tin-Lead Analysis
Drop
Height
β η ρ'
50
813mm
1.33
25.0
0.99
610mm
3.40
38.0
0.93
406mm
2.91
148.0
0.98
0
A Weibull analysis of the “soft failure” data
produced the graphs shown in Fig. 8 and Fig. 9. The
values for these analyses are given in Table 2, where
the correlation coefficient, ρ', is a measure of how
well the linear regression model fits the data. Values
of β change from one stress level to the next; this
suggests that different failure mechanisms are
prevalent for the stress levels used during testing.
Also, the characteristic life η, is considerably lower
for lead-free solder. Comparisons can be made for
drop heights of 610mm and 406mm, where lead-free
η is 7 and 47 drops and tin-lead η is 38 and 148 drops
respectively, a considerable difference.
0
200
400
600
800
1000
Drop Height (mm)
Figure 7: Number of drops to “Soft Failure”.
Strain Results
In this section results from strain measurements are
presented. Figure 10 shows the longitudinal strain
measured on the test board during a 813mm drop. A
second impact occurs after the rebounding drop table
returns to the impact surface after approximately
600ms. Similarly, Figure 11 shows strain measured
during a 103mm drop. As the rebound velocity is
−
800281.004.png 800281.005.png 800281.006.png 800281.007.png 800281.008.png
 
less then the 813mm drop, the secondary impact
occurs after less then 300ms.
the board and also causes the joint to open the circuit
on the other side of the board.
6000
4000
2000
4000
0
2000
-2000
0
Compressive
-4000
-2000
Tensile
-6000
-8000
-4000
-0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Ti m e ( s )
-6000
2
3
4
5
6
7
Figure 10: Microstrain for a 813mm drop.
Change in Velocity, ∆ V (m/s 2 )
Figure 12 shows the maximum strains, in
compression and in tension, recorded during testing
and calculated using the theory presented. The strain
data is plotted against the change in velocity, ∆V.
Compression occurs on initial impact. For the
measured data, the maximum compressive strain
occurs at this point as all subsequent oscillations are
damped.
Figure 12: Maximum microstrain plotted against
change in velocity, ∆V.
6000
3000
4000
2500
2000
2000
0
1500
4000
-2000
1000
2000
-4000
500
0
-6000
0
0
0.01 0.02 0.03 0.04 0.05
Time (s )
-2000
-4000
-6000
Strain
Resistance
-8000
Figure 13: Simultaneous strain and resistance
measurement.
-0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Ti m e ( s )
Resistance Measurements and Failure Analysis
In this section there are two sets of resistance
measurements presented. The first set of results
shows results for a drop height of 203mm and the
second shows results for a drop height of 813mm.
Figure 11: Microstrain for a 103mm drop.
Figure 13 shows a plot of strain and resistance
measured simultaneously during the first 50ms after
impact. The resistance measured was through a joint
that had failed during earlier testing. As the PCB
deflects downward the curvature of the board results
in the maximum compressive strain on one side of
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