Appendix D - Embedded Systems.pdf - Computer Architecture A Quantitative Approach (Dodatki) - Kowalski2015

D.1

Introduction

D-2

D.2

Signal Processing and Embedded Applications: The Digital

Signal Processor

D-5

D.3

Embedded Benchmarks

D-12

D.4

Embedded Multiprocessors

D-14

D.5

Case Study: The Emotion Engine of the Sony Playstation 2

D-15

D.6

Case Study: Sanyo VPC-SX500 Digital Camera

D-19

D.7

Case Study: Inside a Cell Phone

D-20

D.8

Concluding Remarks

D-25

Embedded Systems

Updated by Thomas M. Conte

North Carolina State University

“Where a calculator on the ENIAC is equipped with 18,000 vacuum

tubes and weighs 30 tons, computers in the future may have only

1,000 vacuum tubes and perhaps weigh 1 1/2 tons.”

Popular Mechanics

March 1949

D-2

Appendix D

Embedded Systems

D.1

Introduction

Embedded computer systems—computers lodged in other devices where the

presence of the computers is not immediately obvious—are the fastest-growing

portion of the computer market. These devices range from everyday machines

(most microwaves, most washing machines, printers, network switches, and auto-

mobiles contain simple to very advanced embedded microprocessors) to hand-

held digital devices (such as PDAs, cell phones, and music players) to video

game consoles and digital set-top boxes. Although in some applications (such as

PDAs) the computers are programmable, in many embedded applications the

only programming occurs in connection with the initial loading of the application

code or a later software upgrade of that application. Thus, the application is care-

fully tuned for the processor and system. This process sometimes includes lim-

ited use of assembly language in key loops, although time-to-market pressures

and good software engineering practice restrict such assembly language coding

to a fraction of the application.

Compared to desktop and server systems, embedded systems have a much

wider range of processing power and cost—from systems containing low-end 8-

bit and 16-bit processors that may cost less than a dollar, to those containing full

32-bit microprocessors capable of operating in the 500 MIPS range that cost

approximately 10 dollars, to those containing high-end embedded processors that

cost hundreds of dollars and can execute several billions of instructions per sec-

ond. Although the range of computing power in the embedded systems market is

very large, price is a key factor in the design of computers for this space. Perfor-

mance requirements do exist, of course, but the primary goal is often meeting the

performance need at a minimum price, rather than achieving higher performance

at a higher price.

Embedded systems often process information in very different ways from

general-purpose processors. Typically these applications include deadline-driven

constraints—so-called

real-time constraints.

The lay term “signal” often connotes radio transmission, and that is true

for some embedded systems (e.g., cell phones). But a signal may be an image, a

motion picture composed of a series of images, a control sensor measurement,

and so on. Signal processing requires speciﬁc computation that many embedded

processors are optimized for. We discuss this in depth below. A wide range of

benchmark requirements exist, from the ability to run small, limited code seg-

ments to the ability to perform well on applications involving tens to hundreds of

thousands of lines of code.

Two other key characteristics exist in many embedded applications: the need

to minimize memory and the need to minimize power. In many embedded appli-

cations, the memory can be a substantial portion of the system cost, and it is

important to optimize memory size in such cases. Sometimes the application is

In these applications, a particular

computation must be completed by a certain time or the system fails (there are

other constraints considered real time, discussed in the next subsection).

Embedded systems applications typically involve processing information as

signals.

D.1 Introduction

expected to ﬁt entirely in the memory on the processor chip; other times the

application needs to ﬁt in its entirety in a small, off-chip memory. In either case,

the importance of memory size translates to an emphasis on code size, since data

size is dictated by the application. Some architectures have special instruction set

capabilities to reduce code size. Larger memories also mean more power, and

optimizing power is often critical in embedded applications. Although the

emphasis on low power is frequently driven by the use of batteries, the need to

use less expensive packaging (plastic versus ceramic) and the absence of a fan for

cooling also limit total power consumption. We examine the issue of power in

more detail later in this appendix.

Another important trend in embedded systems is the use of processor cores

together with application-speciﬁc circuitry—so-called “core plus ASIC” or “sys-

tem on a chip” (SOC), which may also be viewed as special-purpose multipro-

cessors (see Section D.4). Often an application’s functional and performance

requirements are met by combining a custom hardware solution together with

software running on a standardized embedded processor core, which is designed

to interface to such special-purpose hardware. In practice, embedded problems

are usually solved by one of three approaches:

The designer uses a combined hardware/software solution that includes some

custom hardware and an embedded processor core that is integrated with the

custom hardware, often on the same chip.

The designer uses custom software running on an off-the-shelf embedded

processor.

The designer uses a digital signal processor and custom software for the pro-

cessor.

are processors specially tailored for signal-

processing applications. We discuss some of the important differences

between digital signal processors and general-purpose embedded processors

below.

Figure D.1 summarizes these three classes of computing environments and

their important characteristics.

Digital signal processors

Real-Time Processing

is one where a segment of the

application has an absolute maximum execution time that is allowed. For exam-

ple, in a digital set-top box the time to process each video frame is limited, since

the processor must accept and process the frame before the next frame arrives

(typically called

real-time performance requirement

). In some applications, a more sophisti-

cated requirement exists: the average time for a particular task is constrained as

well as is the number of instances when some maximum time is exceeded. Such

approaches (typically called

hard real-time systems

) arise when it is possible to occasion-

ally miss the time constraint on an event, as long as not too many are missed.

soft real-time

Often, the performance requirement in an embedded application is a real-time

requirement. A

D-4

Appendix D

Embedded Systems

Feature

Desktop

Server

Embedded

Price of system

$1000–$10,000

$10,000–$10,000,000

$10–$100,000 (including network

routers at the high end)

Price of microprocessor

module

$100–$1000

$200–$2000 (per

processor)

$0.20–$200 (per processor)

Microprocessors sold per

year (estimates for 2000)

150,000,000

4,000,000

300,000,000 (32-bit and 64-bit

processors only)

Critical system design

issues

Price-performance,

graphics performance

Throughput, availability,

scalability

Price, power consumption,

application-speciﬁc performance

Note the wide range in

system price for servers and embedded systems. For servers, this range arises from the need for very large-scale mul-

tiprocessor systems for high-end transaction processing and Web server applications. For embedded systems, one

signiﬁcant high-end application is a network router, which could include multiple processors as well as lots of mem-

ory and other electronics. The total number of embedded processors sold in 2000 is estimated to exceed 1 billion, if

you include 8-bit and 16-bit microprocessors. In fact, the largest-selling microprocessor of all time is an 8-bit micro-

controller sold by Intel! It is difﬁcult to separate the low end of the server market from the desktop market, since low-

end servers—especially those costing less than $5000—are essentially no different from desktop PCs. Hence, up to a

few million of the PC units may be effectively servers.

A summary of the three computing classes and their system characteristics.

Real-time performance tends to be highly application dependent. It is usually

measured using kernels either from the application or from a standardized bench-

mark (see Section D.3).

The construction of a hard real-time system involves three key variables. The

ﬁrst is the rate at which a particular task must occur. Coupled to this is the hard-

ware and software required to achieve that real-time rate. Often, structures that

are very advantageous on the desktop are the enemy of hard real-time analysis.

For example, branch speculation, cache memories, and so on, introduce

uncer-

into code. A particular sequence of code may execute either very efﬁciently

or very inefﬁciently, depending on whether the hardware branch predictors and

caches “do their jobs.” Engineers must analyze code assuming the

worst case

execution time

(WCET). In the case of traditional microprocessor hardware, if

the WCET is

overly pessimistic. Thus the system designer may end up overdesigning a system

to achieve a given WCET, when a much less expensive system would have suf-

ﬁced.

In order to address the challenges of hard real-time systems, and yet still

exploit such well-known architectural properties as branch behavior and access

locality, it is possible to change how a processor is designed. Consider branch

prediction: although dynamic branch prediction is known to perform far more

accurately than static “hint bits” added to branch instructions, the behavior of

static hints is much more predictable. Furthermore, although caches perform bet-

ter than software-managed on-chip memories, the latter produces predictable

memory latencies. In some embedded processors, caches can be converted into

software-managed on-chip memories via

all branches are mispredicted

and

all caches miss,

line locking.

In this approach, a cache

Figure D.1

tainty

one assumes

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