816FAQs.pdf

ADuC816 FAQs

M ICRO C ONVERTER G ENERIC

L AYOUT AND D ESIGN C ONSIDERATIONS

Q: The MicroConverter has separate pins for analog and digital grounds . Should I connect these to

two separate ground planes on my board?

A: No. At least, not unless the two ground planes are connected together very near the chip. In all

other situations, it is best to keep the MicroConverter on a single ground plane. If you have two

separate ground planes on your board, then place the MicroConverter on the quieter of the two

(usually the analog plane) to obtain optimum ADC and DAC performance.

Q: I have some fast logic edges on some of the digital circuitry I plan to connect to the

MicroConverter. Will these signals impact the analog performance of the chip?

A: Signals with rise and fall times of less than 5ns or so, when applied directly to a MicroConverter’s

digital input pins, can potentially feed through and degrade analog performance. A simple solution

to this problem is found in the form of a series resistor. A series resistor of around 200W will slow

an edge sufficiently that it won’t affect the MicroConverter’s analog performance.

M ISCELLANEOUS

Q: When a MicroConverter DAC is disabled, what does it’s output look like? Is there a DAC “tri-

state” feature?

A: MicroConverter DACs default to a disabled state when the chip is powered up. In this state, the

output appears as a high impedance node to the rest of the world. This is analogous to a “tri-state”

type output in digital logic terms. You can place the DAC output into this high impedance state

whenever you like simply by disabling the DAC again.

Q: I heard that the MicroConverter can address up to 16Mbytes of external data memory . Is this

true and how is it done?

A: Yes, the MicroConverter can address up to 16Mbytes of external data memory. If access to more

than 64 Kbytes of RAM is desired, a feature unique to the MicroConverter allows addressing up to

16 Mbytes of external RAM simply by adding an additional latch on the Port 2 address bus.

On a standard 8051 as with the MicroConverter Port 0 (P0) serves as a multiplexed address/data

bus. It emits the low byte of the data pointer (DPL) as an address, which is latched by a pulse of

ALE prior to data being placed on the bus by the MicroConverter (write operation) or the SRAM

(read operation). Port 2 (P2) provides the data pointer page byte (DPP) to be latched by ALE,

followed by the data pointer high byte (DPH). If no latch is connected to P2, DPP is ignored by the

SRAM, and the 8051 standard of 64kByte external data memory access is maintained.

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ADuC816 FAQs

Q: I would like to serially download new code to the MicroConverter using my host machine. What is

the serial download protocol used to reprogram the MicroConverter?

A: MicroConverters can be serially reprogrammed in your system using Analog Devices’ Windows

based download program (WSD.exe) to communicate through the chip’s UART. Alternatively,

you can in-system-reprogram the MicroConverter from any other host processor using the same

serial download protocol used by the WSD application. Refer to tech note uC004 available on the

web or as part of the QuickStart Development System.

Q: What’s this “ power-on configuration routine ” that I’ve heard about?

A: Every MicroConverter product features a “power-on configuration routine” that runs every time

you apply power to the chip or reset it. Basically, this is a small piece of code that is executed prior

to the execution of your code. It is used to configure some of the on-chip peripherals such as the

ADC and Flash/EE memory with factory optimized calibration and timing parameters. Some of

these you can see (for example, default ADC offset and gain calibration registers will be different

from one chip to the next) and others you can’t (for example, ADC linearity, PTAT coefficients are

not visible to your code). For the MicroConverter devices that run off a 32kHz crystal the power

on configuration will also wait for the part to ‘lock’ before it starts to run user code.

The power-on configuration routine is stored in a hidden area of program ROM. The address

where the routine begins is FF00 hex. Although the power-on configuration routine is “mapped” to

addresses FF00 through FFFF hex, this does not interfere with external code memory which shares

these addresses. Up to 64K bytes of user code can be executed from an external PROM chip (or

8K from internal Flash/EE and 56K from external PROM).

The ALE output is automatically disabled during the execution of the power-on configuration

routine so that you can tell when your code starts to execute. ALE only begins toggling when the

first line of your code is executed.

Q: The PSEN pin is always an output on an 8051. How then can it be used as an input to enter serial

download mode? What pulldown resistor should be used to be sure to enter serial download

mode? Is the standard functionality of the PSEN pin affected?

A: On an 8051 the PSEN pin is always an output. It is used to access from external code memory. On

the MicroConverter the PSEN pin is used to access external code memory and is used as an input

to determine whether to run user code or run the on chip serial downloader.

The PSEN pin is normally configured as an output. When the RESET pin is pulled high, the

PSEN pin becomes a digital input and the voltage at the PSEN pin is sampled every machine

cycle. Once the RESET pin is released (low) the last sampled logic level of the PSEN pin is used

to decide whether to run from user code or whether to run the on chip serial downloader.

To ensure that the PSEN pin is interpreted as a logic low it should be pulled low through a 1k

resistor to ground. To ensure that the PSEN pin is interpreted as a logic high it can be left float as

there is an internal pullup resistor.

Because the functionality of the PSEN pin on the MicroConverter only differs from that of an

8051 when RESET is pulled high (in this condition the PSEN pin on an 8051 is useless) the

functionality of the PSEN pin on the MicroConverter is unaffected by its additional functionality.

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ADuC816 FAQs

Q: Do I have to enter “NOP” instructions to wait for the Flash/EE erase and program times to

elapse before performing the next data Flash/EE operation?

A: Absolutely not. All timing for access to the data Flash/EE space is taken care of for you in

hardware. When you perform a Flash/EE erase or program command, the MCU core will not

move on to the next machine cycle until the Flash/EE operation is complete. Effectively this means

that a Flash/EE erase or program command will only take one machine cycle, but that this machine

cycle is stretched out over a 20ms/250µs period for a Flash/EE erase/program command on the

ADuC812 or over a 2ms/250µs period for a Flash/EE erase/program command for the

ADuC816/ADuC824.

Q: What happens if the power supply falls during a program or erase of the Flash/EE data

memory?

A: If the power supply falls below 2.7V during a Flash/EE program or erase instruction then the core

cannot guarantee that the instruction will execute correctly.

Also, because the Flash/EE program or erase instruction takes much longer than a typical

instruction (250us for a program and 20ms/2ms (ADuC812/(ADuC816 or ADuC824)) for an

erase), the time required to respond to interrupts can be greatly increased if the interrupt occurs

during a flash/EE program or erase instruction.

For instance, if a power-supply-monitor (PSM) interrupt occurs during a Flash/EE program or

erase instruction, it will only be processed after the instruction is complete. In this way, the PSM

can be used to indicate when power has dropped below a specified threshold during a Flash/EE

program or erase instruction, thereby indicating that the instruction may not have executed

correctly.

Q: Are there any sockets available for the 52PQFP package ?

A: Yes, but only test or evaluation type sockets. They aren't suitable for production since they are ZIF

types that cost many times the price of the MicroConverter products. They can, however, prove

useful for test/programming heads or in some cases for debug/prototyping setups. A couple of

different types include the below....

Enplas:

OTQ-52-0.65-01: "open-top" type

FPQ-52-0.65-01A: "clam-shell" type

(sockets mount on through-hole pattern, useful for test/programming heads.)

Ironwood Electronics:

CA-QFE52SB-L-Z-T-01: socket module

SF-QFE52SB-L-01: board header

(board header solders to 52PQFP footprint, and socket adapter plugs into it to accept

MicroConverter package. also provides test point connections to all 52 pins. useful for

debug/prototyping setups.)

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ADuC816 FAQs

AD U C816 S PECIFIC

ADC S G ENERAL

Q: The datasheet says the ADuC816’s ADCs are calibrated in the factory, will I ever need to

calibrate the ADCs ? How long does a calibration cycle take?

A: At power-on, factory calibration coefficients (for both the primary and auxiliary ADC) are

automatically downloaded to the calibration registers in the ADuC816 SFR space. These

calibration registers will be overwritten if any of the four calibrations are initiated by writing to the

mode bits in ADCMODE. Both ADCs are chopped meaning that an internal offset calibration

should never be required. Also, because factory 5V/25C gain calibration coefficients are

automatically present at power-on, an internal full-scale calibration will only be required if the part

is being operated at 3V or at temperatures significantly different from 25C.

During an ADC calibration the ADC automatically converts on the slowest update rate (5Hz).

Since two ADC conversions are required (ADC input chopping is used to minimize system offset)

each calibration takes 0.374s.

Q: I want to overwrite the ADC factory calibration coefficients. Do I have to do a calibration every

time I run my software.

A: Every time the ADuC816 is reset, the factory calibrated calibration coefficients are downloaded to

the calibration registers in the SFR space. Hence these SFRs must be overwritten with your

individual calibration coefficients. To avoid having to do a calibration every time that the

ADuC816 powers up it is often easier to write the calibration coefficients to the Flash/EE data

memory space. Then in your own initialization the coefficients can simply be read from the

flash/EE data memory and the calibration process does not have to be repeated.

Q: Where's the ADC DMA mode gone, I see no reference to it in the ADuC816 datasheet?

A: Since for the ADuC816 the ADC conversion time is so long in comparison to the time it takes to

write an ADC conversion result into external data memory the ADC DMA mode is not of any

significant advantage and was therefore removed for the ADuC816.

Q: What's the difference between the INL spec and the noise spec on the ADC?

A: Any given ADC conversion result has both an INL error and a noise error. The INL specification

on the ADuC816 gives accuracy to 1 LSB). Depending on the range and the update rate this ADC

conversion result will have a varying amount of noise on it.

The noise which exists on this ADC conversion result is random and is equally as likely to be

positive as negative. Hence by doing more averaging this noise error can be reduced. Since the

INL will stay constant for every ADC conversion (given the same DC input) then software

averaging will not remove the INL error.

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ADuC816 FAQs

AD U C816 P RIMARY ADC:

Q: The primary ADC is differential . Can I convert on a single-ended input voltage by grounding one

of the inputs.

A: No, the ADC inputs for the primary ADC cannot be within 100mV of the rails. Hence one of the

primary ADC inputs cannot be grounded. To convert on a single-ended input voltage either bias

the signal up to a voltage so that the input signal is never within 100mV of the rails or use the

Auxiliary ADC which features single-ended inputs.

Q: The ADC noise tables on page 33 of the ADuC816 datasheet show that the effective resolution

depends on the range and update rate selected. Why?

A: The ADuC816 features Sigma Delta ADCs. Sigma Delta ADCs use a method of averaging (using a

sinc 3 filter) to obtain the very high accuracy ADC conversion results. The more averaging that is

done the more accurate the ADC conversion is going to be. With high update rates the ADC gets to

perform less averaging in hardware on the chip. Hence the resolution will not be as good. With

slower update rates more averaging is done on the chip and the resolution is improved.

The resolution of the ADC also depends on the input voltage range. Noise added to an input signal

with the ADC converting on the 2.56V range will affect the conversion result much less (128 times

less) than the same amount of noise being added to a signal converting on the 20mV range. Hence

converting on a larger signal will produce an ADC result accurate to many more bits.

Q: Is it possible to switch OFF the internal buffer of primary ADC? Some of the AD77xx family

have this particular feature on board. Can I turn chopping off like on AD77xx parts so as to

increase throughput time?

A: No, it is not possible to turn off the internal buffer of the primary ADC. The auxiliary ADC

provides an unbuffered input if required. It is also not possible to turn ADC chopping off on the

ADuC816.

Q: I am changing ranges and I am seeing much more than 2uV gain mis-match. Why?

A: You should not see much more than 2uV gain matching. i.e. as you changes the range from one

range to another the difference in an ADC results between one range and the next should typically

correspond to less than 2uV.

However if you have performed a system offset calibration then you will have changed the offset

calibration registers (OF0H/M). Since the ADCs use chopping there is no need for an offset

calibrated in the factory. Hence the default offset calibration coefficients are 8000h. Once a system

offset calibration is performed the OF0H/M get overwritten by values that when subtracted with a

zero input will produce a zero reading. When the range is changed, however, the offset calibration

registers still apply to the previous range.

e.g. if on the 20mV range a system offset of 10uV existed producing an offset calibration

coefficient of 8021h. Now imagine that the range is changed to the 40mV range. The OF0L

range the offset would correspond to 1.28mV.

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