112504di.pdf

design

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Edited by Brad Thompson

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Quickly find pc-board shorts

with low-cost tracer technique

Teno P Cipri, Engineering Expressions Consulting

for production pc boards is shorted

traces. Finding hidden shorts is of-

ten time-consuming and frustrating.

Typical techniques of cutting traces, lift-

ing pads, and “blowing” shorts are, at

best, questionable because they may af-

fect the reliability of the circuit, and the

ever-decreasing geometries and lower

voltage ICs make these practices tricky

and risky. High-end, four-wire DMMs

(digital multimeters) or ohmmeters,

which can accurately measure the small

resistance values, are expensive

and sometimes not available on a

designer’s bench.

An inexpensive alternative approach

for finding short circuits, using the con-

cepts of four-wire DMMs and ohmme-

ters is simple and requires only the tools

you already have on your bench and a ba-

sic understanding of Ohm’s Law. This ap-

proach uses the principal that all con-

ductors have resistance properties, and a

distinct voltage drop exists between the

various nodes in the shorted circuit. This

approach systematically locates the nodes

with lowest impendence between them

and isolates the fault to two nodes.

CURRENT PATH

NO VOLTAGE DROP

TRACE A

NODE 1

NODE 2

NODE 3

NODE 4

SHORT

TRACE B

NODE 7

NODE 6

NODE 5

NO VOLTAGE DROP

LOWEST VOLTAGE DROP

Figure 1

By applying a fixed current to various nodes and looking at the resultant voltage drops, you can

home in on the likely location of a pc-board short circuit.

over

the length of the run, but a trace imped-

ance of only 200 m

keep the battery from depleting when the

circuit is not in use.

A node can be any accessible part of the

circuit path under test, such as a via, a

pad, or a test point ( Figure 1 ). Note the

current path: When current is flowing be-

tween two nodes, a minute voltage drop

occurs across the two nodes. When the

current doesn’t flow between two nodes,

there is no voltage drop across those

nodes.

To find the short in this example, put

one DMM probe on any node on Trace

A and the other on any node on Trace B,

and note the voltage drop. In this exam-

ple, if you had started with the positive

probe on Node 1 and the negative probe

on Node 5 and moved the negative probe

to Node 6, you would note a slight volt-

age drop. Next, you move the probe to

Node 7 and note that the voltage drop is

equivalent to the voltage drop at Node 6.

From this test, you can deduce that the

short must exist between nodes 5 and 6

because no current flows from Node 6 to

Node 7. Then, move the positive probe to

Node 2 and note a small voltage drop.

still has a 2-mV

drop with 10-mA current applied. Most

lab-grade handheld DMMs can easily re-

solve to 1 mV. Because you are looking for

relative values, the absolute accuracy of

the instrument isn’t critical. However, the

current must be constant to achieve re-

peatable results, and you must isolate its

current source from the ground of the

circuit under test.

A 1.5V battery in series with a 1.5-k

Quickly find pc-board shorts

with low-cost tracer technique .................... 97

Read isolated digital signals

without power drain ...................................... 98

MOSFET shunt regulator

substitutes for series regulator ................ 100

Zener test circuit serves

as dc source .................................................. 104

Gain-programmable circuit

offers performance and flexibility ............ 106

Publish your Design Idea in EDN . See the

What’s Up section at www.edn.com.

resistor is an adequate current source for

this purpose. The battery provides the

isolation and relatively constant voltage;

select the resistor to source around 10

mA. (For lower impedance traces, such as

power-supply lines, or in situations in

which the DMM lacks millivolt resolu-

tion, use a higher current.) An optional

clamping diode, with a cathode connect-

ed to the battery’s negative terminal and

an anode connected to the resistor’s free

end, provides protection for low-voltage

logic circuits. If you use the diode, you

may also need to add a power switch to

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NOVEMBER 25, 2004 | EDN 97

A PREDOMINANT FAILURE mechanism

Most digital buses have at least 1

design

ideas

Continue down the line to Node

3 and note another small drop.

Next, probe Node 4 and note

there is no voltage

drop. You can now

deduce that the short must be be-

tween nodes 2 and 3 and nodes

5 and 6.

Redrawing Figure 1 with the

equivalent circuit in Figure 2

makes clear how this technique

works. You are now looking at a

simple series network of resistors

and looking for voltage drops across any

resistor that has current flowing through

it. When a node is outside the current

path, no voltage drop occurs. By under-

standing the relationship of each of the

vias and their position in the current

path, you can systematically isolate the

short by looking for lower voltage (cur-

rent flowing) or higher voltage (current

NODE 5

NODE 6

NODE 7

source is connected to any node on

Trace A and the other side of the

current source is connected to any

node on Trace B.

In this example, the short is be-

tween two node pairs, and you can

isolate the short only to those

pairs. A little knowledge of the

board layout and common sense

now come into play. You need to

know only where the two traces

are adjacent between nodes 5 and

6 and nodes 2 and 3, and you have

found the most likely place for the short.

If it is underneath a component, you have

to remove the component; removing the

component often removes the short. If

the short is on an internal layer, you may

have to do some selective cutting and

jumping to isolate the short from the

traces, but at least you minimize the

number of cuts on the board.

TRACE A

Figure 2

SHORT

TRACE B

NODE 1

NODE 2

NODE 3

NODE 4

The equivalent circuit of the pc-board layout shows the principal

of the source-and-probe technique.

not flowing). When current is flowing,

the short is farther from the current

source. If no current is flowing, then the

short is closer to the current source. This

two-valued logic makes it simple to iso-

late the problem. The beauty of this tech-

nique is that it doesn’t matter to which

two nodes the current source is connect-

ed, as long as one side of the current

Read isolated digital signals without power drain

Alfredo H Saab and Joseph Neubauer, Maxim Integrated Products Inc, Sunnyvale, CA

signers a straightforward method of

establishing galvanic isolation be-

tween circuits that operate at different

ground potentials, they do not provide an

ideal approach. An optocoupler draws

power from the isolated circuit, switches

relatively slowly, and loses current-trans-

fer ratio as its light emitter ages.

The circuit in Figure 1 overcomes

these limitations by replicating a digital

signal’s state, drawing no power from the

isolated input, and consuming only

modest power on the nonisolated side.

As Figure 2 shows, the circuit imposes

only a 20-nsec input-to-output delay

from the positive edge of SENSE_CLK to

DATA_OUT.

MOSFET transistor Q 1 oper-

ates in either of two states—high resist-

ance between source and drain (R DS/OFF ),

or low resistance (R DS(ON) ) when a control

signal drives Q 1 into conduction. When

conducting, Q 1 imposes a low resistance

across T 1 ’s secondary winding, W 3 .The

remainder of the circuit senses the state

of T 1 ’s secondary resistance. Resistor R 1 ,

capacitor C 1 , and the complementary in-

SENSE_CLK

MAX5048

ISOLATION

BARRIER

T 1

R 1

IC 1

W 1

W 3

ONE

TURN

ONE

TURN

1/4 74HC132

C 1

50 pF

Q 1

IC 2

W 2

W 4

2N7000

R 2

ONE

TURN

ONE

TURN

DATA_IN

20 pF

T 2

IC 2

C 2

ISO_COMMON

1/4 74HC132

DATA_OUT

C 3

IC 3

0.1

MAX913

Figure 1

R 3

R 4

3.3k

1.5k

You can use a simple ferrite-bead transformer to isolate logic-level signals.

puts of MOSFET-driver IC 1 differentiate

the SENSE_CLK signal’s positive-going

input edge, producing a positive-going

5V pulse at IC 1 ’s output and driving one

end of winding W 1 . Figure 2 shows the

relationship among the circuit’s signals.

Connected in series-aiding mode, the

two primary windings W 1 and W 2 of T 1

98 EDN | NOVEMBER 25, 2004

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A LTHOUGH OPTOCOUPLERS offer de-

design

ideas

form a 2-to-1 inductive volt-

age divider whose center tap

drives the inverting input of

IC 3 , a high-speed compara-

tor. With Q 1 off and thus pre-

senting an open circuit

across the secondary of T 1 ,

the junction of windings W 1

and W 2 applies a pulse of ap-

proximately 2.5V to com-

parator IC 3 ’s inverting input

and drives IC 3 ’s internal state

low. Meanwhile, IC 2 ’s two

gates, resistor R 2 and capaci-

tor C 2 generate a short strobe

pulse in the middle of IC 1 ’s

output pulse and applied to

IC 3 ’s LE (latch-enable) input.

Latching IC 3 ’s internal

state to its external output

(DATA_OUT) produces

a logic-low output that

follows DATA_IN. If DATA_

IN goes sufficiently positive

to bias Q 1 on, Q 1 ’s low resistance across

W 3 reflects a low impedance to windings

W 1 and W 2 of T 1 . The reduced pulse am-

plitude at the junction of W 1 and W 2 and

IC 3 ’s inverting input of approximately

0.5V is insufficient to trigger IC 3, , and

IC 3 ’s internal state goes high. The latch-

1V/DIV

and R 4 set IC 3 ’s trigger-volt-

age threshold. Transformer

T 1 provides a 1-to-1-to-1

turns ratio and comprises a

single-hole ferrite bead

(Fair-Rite part number

2673000101) with three

identical single-turn wind-

ings. To minimize stray in-

ductance, keep the connec-

tion to the junction of

windings W 1 ,W 2 , and IC 1 as

short as possible. Also, the

grounded end of W 2 should

return to IC 1 ’s ground con-

nection.

The circuit’s isolation ca-

pabilities depend on its pc-

board layout and the prop-

erties of transformer T 1 ,

whose type 73 ferrite core is

moderately conductive.

Thus, T 1 ’s isolation proper-

ties depend on its windings’

insulation. For example, Teflon or Kap-

ton-insulated wire can withstand sever-

al kilovolts. If you carefully construct T 1

using the specified core and Teflon-in-

sulated AWG #24 wire, the transformer

can exhibit interwinding capacitances of

0.2 pF or less.

SENSE_CLK

MAX5048

OUTPUT

MAX913- INPUT

MAX913 LE

DATA_IN

DATA_OUT

50 nSEC/DIV

Figure 2

Each positive-going transition of SENSE_CLK transfers the

state of the galvanically isolated digital signal at DATA_IN to DATA_OUT.

ing pulse at LE forces IC 3 ’s DATA_OUT

high, again following the state of

DATA_IN.

IC 1 ,IC 2 , and IC 3 operate from a single

5V power supply. Separate bypass capac-

itors placed adjacent to each device’s

power pins minimize noise. Resistors R 3

MOSFET shunt regulator substitutes

for series regulator

Stuart R Michaels, SRM Consulting

ear regulator or a dc/dc converter to

obtain 3V dc from a higher supply.

However, when breadboarding a concept,

you may be able to use a shunt regulator,

especially if a series regulator of the cor-

rect voltage is unavailable. The MOSFET

in Figure 1 can replace a zener diode in a

shunt regulator and provide lower output

impedance than a zener diode.

The MOSFET is self-biased by con-

necting its drain to its source. The differ-

ence between the input voltage and the

gate-to-source threshold voltage, V GS ,sets

the current. The IRF521 in this example

A. The upper curve of Figure 2 shows

that the IRF521 achieves a gate-to-source

voltage of 3V at a current of about 200

at 50 mA. Because you operate the MOS-

FET at or near threshold, its on-resistance

spec doesn’t apply, and the output im-

pedance of this circuit is far higher than

you would expect from the on-resistance.

However, in general, the lower the on-re-

sistance, the lower the output impedance

at a specific current near threshold.

This circuit may require that R 2 and C 1

stop the oscillation in the MOSFET. Add

a filter capacitor to the output to mini-

mize the effect of load transients. Con-

necting a large filter capacitor from the

gate to the source with short leads elim-

inates the need for R 2 . You can use other

A. MOSFETs can vary from device to

device, but the typical MOSFET has a

threshold at approximately the mean be-

tween the maximum and the minimum

limits.

The lower curve in Figure 2 is the out-

put impedance, which you obtain from

the upper curve by differentiating the

upper curve. Although the output im-

pedance, R OUT , is near 800

at a current

of 100

A, it rapidly drops to less than 6

100 EDN | NOVEMBER 25, 2004

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Y OU WOULD NORMALLY use a series lin-

has a threshold voltage of 2 to 4V at 250

design

ideas

V IN

R 1

GATE-TO-SOURCE THRESHOLD VOLTAGE

V OUT

V GS (V)

R OUT (k

)

R 2

100

IRF521

C 1

0.1

OUTPUT IMPEDANCE

A MOSFET configured to

replace a zener diode of a

shunt regulator provides lower impedance

than a diode-based implementation.

I D (

Figure 1

Figure 2

edn041111di35301 DIANE

A plot of key parameters—gate-to-source voltage and output impedance—versus drain current

shows smoothness of variation over two and one-half decades.

MOSFET families and other voltages if

necessary.

Although you may be unable to get the

exact output voltage you need at the cur-

rent you prefer, many devices tolerate

wide variations in operating voltage. For

instance, many 3.3V-dc microcontrollers

can operate as low as 2.5V dc and as high

as 3.6V dc. Note that operating a MOS-

FET near its threshold causes a large neg-

ative-temperature coefficient of the gate-

to-source voltage. This circuit has signif-

icant change in output voltage over a

wide temperature range; it is suitable for

only limited temperature ranges.

Zener test circuit serves as dc source

John Jardine, JJ Designs, West Yorkshire, UK

tile test circuit for zener diodes after

yet another misread zener diode had

infiltrated the ranks of 1N4148 diodes

assembled on a pc board. As a bonus, the

circuit can serve as a moderate-voltage,

power-limited adjustable dc source. Al-

though conventional multimeters’ resist-

ance ranges typically apply enough volt-

age to forward-bias most diodes, few can

drive a zener diode into reverse conduc-

tion. Figure 1a shows a simple variable-

frequency dc/dc step-up converter whose

output voltage depends on the device

under test’s breakdown voltage.

Upon power application, Pin 3 of IC 1

(one section of a 74HC132 quad dual-in-

put Schmitt-trigger NAND gate) goes to

logic one and switches on Q 1 , an N-chan-

nel logic-level power MOSFET. Current

flows through Q 1 and R 6 and stores en-

ergy in inductor L 1 ’s magnetic field.

Zener diode D 1 limits the voltage at

IC 1 ’s Pin 1 to 4.7V. Simultaneously, diode

100V

5 V

100V

AT I DC 2A

2.1V

FULL LOAD

L 1

330

D 3

BA157

OUTPUT

NOMINAL

100V AT 10 mA

10 TO 110 kHz

E 1

E 2

2.7V

4.7V

R 6

2.2

R 1

47k

R 2

47k

C 1

47 pF

IN5617GP

FET (LOGIC)

0.3, 200V

2SK2350

MAXIMUM

LOAD

Q 1

C 3

1 F

150V

IC 1

R 5

100k

74HC132 (1/4)

R 3

10k

R 4

100k

D 2

IN4148

D 1

4.7V

IN750

15V

50k

C 2

10 nF

LOGIC ONE WHEN

UNIT IS RUNNING

VARIABLE

22 TO 110V

OUTPUT

(a)

(b)

The output voltage of a simple variable-frequency dc/dc step-up converter depends

on the device under test’s breakdown voltage (a). To use the circuit as a variable

medium-voltage power supply, replace the device under test with a network (b).

104 EDN | NOVEMBER 25, 2004

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T HIS DESIGN IDEA describes a versa-

Figure 1

design

ideas

D 2 and resistor R 3 charge C 2 and establish

a logic one at IC 1 ’s Pin 2. When the volt-

age at point E 1 reaches approximately

2.7V, IC 1 ’s input-voltage threshold, IC 1 ’s

output goes to logic zero, switching off

Q 1 .

Energy stored in L 1 ’s magnetic field

discharges through fast-recovery diode

D 3 and charges C 3 . Capacitor C 1 helps re-

move diode D 1 ’s stored charge and helps

restart the charging cycle.

After several cycles, the voltage at E 2

reaches the device under test’s reverse-

breakdown voltage and feeds current via

R 1 to IC 1 ’s Pin 1. As a result, the voltage

at E 2 stabilizes at the sum of the device

under test’s reverse-breakdown voltage

and a constant offset voltage of 5.4V

comprising the voltage across D 1 —

4.7V—plus the forward voltage across

D 3 —0.7V. Thus, for a 100V zener as the

device under test, the voltage at E 2 meas-

ures approximately 105.4V.

At start-up and under fault conditions,

resistor R 4 , diode D 2 , and resistor R 3 pro-

duce an asymmetrical oscillation at ap-

proximately 2 kHz, which reduces the av-

erage current through L 1 and Q 1 to a safe

level.

To use the circuit as a variable medi-

um-voltage power supply, replace the de-

vice under test with the network in Fig-

ure 1b . Adjusting the potentiometer

varies the voltage at point E 2 from 22 to

120V. Maximum current available from

the circuit depends on the dc resistance,

L 1 ’s magnetic-saturation characteristics,

and Q 1 ’s on-resistance. For a nominal 5V

power supply and 430 mA of input cur-

rent, the circuit delivers 10 mA at 100V

for a 100V output, yielding an efficiency

of approximately 50%. Feeding L 1 from a

separate 12V power supply improves ef-

ficiency.

If you design your own inductor for L 1 ,

aim for a nominal inductance of 330

. For optimum operation, use

a fast-recovery diode for D 3 and a logic-

level N-channel MOSFET with a break-

down voltage of 200V or greater and an

on-resistance of less than 0.3

for Q 1, .

Note that zener-diode manufacturers

specify breakdown voltages at specific

test currents. Also, when you subject

them to high reverse voltages, signal

diodes exhibit zener behavior.

Gain-programmable circuit

offers performance and flexibility

Luo Bencheng, Key Laboratory of Mental Health, Institute of Psychology,

Chinese Academy of Sciences

Y OU CAN USE a standard precision in-

pins Z 0 to Z 2 of IC 2

with a microcontroller

to provide self-ad-

justable gain according

to the selected weight-

ing resistor. Unfortu-

nately, the perform-

ance and quality of the

circuit cannot provide

good performance and

high quality due to the

on-resistance of IC 2 ,

which you also cannot

control, especially as

the tempera-

ture changes.

The modified gain-

adjustable amplifier

circuit in Figure 2 uses

the same IC 1 but

changes IC 2 to a pro-

grammable 2-of-8 dif-

ference-input analog multiplexer, which

connects to four balancing resistors, R 01

to R 04 , and eight weighting resistors, R G1

R 1

strumentation amplifier, such as the

INA118 or AD623, as a gain-pro-

grammable amplifier with high accura-

cy and wide gain range. However, the gain

range of such parts is fixed at certain val-

ues, limiting their flexibility. To solve the

problem, a usual way is to use a gain-ad-

justable circuit controlled by a micro-

computer ( Figure 1 ).

IC 2 is a programmable 1-of-8 analogy

multiplexer that connects to eight

weighting resistors, R 1 to R 8 , to improve

the gain range of the circuit based on IC 2 ,

a general-purpose precision amplifier.

The overall gain of the circuit depends on

the value of the selected weighting resis-

tor, as follows:

GAIN

SELECT

(VIA MICRO-

CONTROLLER)

R 2

R 3

R 4

R 5

R 6

R 7

R 8

IC 2

V IN

R 0

IC 1

OP27

V OUT

Figure 1

A basic gain-programmable amplifier circuit uses digital outputs

from a microcontroller to set gain.

where R ON is the on-resistance of IC 2 , and

R X is one of the selected weighting resis-

tors, R 1 to R 8 . You control the port-select

to R G8 , to improve the gain range of the

circuit. By controlling the port-select pins

Z 0 to Z 1 of IC 2 with a microcontroller, the

106 EDN | NOVEMBER 25, 2004

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at 2A and a dc winding resistance of less

than 0.5

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