HEL00 - Schematics.pdf
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COMPAL CONFIDENTIAL
MODEL NAME :
Biathlon (IBM 15R)
D
COMPAL P/N :
PCB NO :
HEL00
LA-3091P
D
Revision :
1.0
C
C
IBM 15R Schematics Document
uFCBGA/uFCPGA Mobile Dothan
Alviso 915+ ICH6-M
2 Channel DDR2
B
B
2005-12-20
REV : 1.0
SW LED/B
LS-3093P
M/B LA-3091P
A
A
TP/B
LS-3094P
LED/B
LS-3092P
Compal Electronics, inc.
Compal Secret Data
Security Classification
2005/03/01
2006/03/01
Title
Issued Date
Deciphered Date
SCHEMATIC, M/B LA-3091P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
Rev
401409
B
Custom
@, 09, 2006
ᑞɓ˜
Date:
Sheet
1
of
44
5
4
3
2
1
5
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3
2
1
Block Diagram
Compal confidential
Dothan
FAN
Thermal(CPU)
+3VS
Clock Generator
uFCPGA CPU
+12VALW
+5VALW
+3V
ADM1032ARZ
ICS954226AG
+3VS
+VCCP (1.05V)
page 33
page 5
page 17
D
D
+VCC_CORE
+3V
+3VS
page 6,7,8
Memory
BUS(DDR2)
Dual Channel
System Bus
HA#(3..31)
HD#(0..63)
400 / 533MHz
SO-DIMM X 1
1.8V 266MHz
BANK 0, 1
LED/ BD
Internal GM
LVDS Conn
CRT Conn
TV-OUT
page 13
Channel A
LS-3092
B+
Alviso Intel 915 GM
+0.9VS
+1.8V
+5VALW
+1.5VS
+3VALW
page 32
+3VS
+5VS
+2.5VS
GMCH-M
1257 FC-BGA
+1.8V
SW LED/ BD
+VCCP
1.8V 266MHz
SO-DIMM X 1
BANK 2, 3
LS-3093
page 15,16
+3VS
+3VALW
+3VS
page 32
+2.5VS
Channel B
page 14
page 8,9,10,11,12
C
T/P BD
C
+0.9VS
+1.8V
LS-3094
IDSEL:AD18
(PIRQG,H#,GNT3#,REQ3#)
+5VS
page 32
DMI
Mini PCI Conn
1.5V
100MHz
MDC
POWER Circuit
+3VS
+3V
+5VS
Cable
RJ11
+5VS
page 27
+3VS
page 36
+3V
IDSEL:AD20
(PIRQA,B#,GNT1#,REQ1#),SIRQ
AC97'
3.3V 24.576MHz
PCI BUS
3.3V 33MHz
ICH6
IDSEL:AD16
(PIRQE#,GNT2#,REQ2#)
IDSEL:AD17
(PIRQF#,GNT0#,REQ0#)
+3VS
+3V
+1.5VS
+1.5V
+2.5VS
609 BGA
ATA100
VIA6311S
1394
CardBus
Controller
AC97 CODEC
HeadPhone &
MIC Conn
RTL 8100CL/100
RTL 250
Parallel ATA
page 22
ENE CB714
page 18,19,20,21
+3VS
+5VS
+3VS
+5VS
+5VAMP
+3VS
+3VALW
page 28
page 29
B
page 26
+CBS_VCC
page 25
page 23
B
IDE
LPC BUS
CD-ROM
page 22
AMP & INT.
Speaker
page 29
INT. MIC
Conn
1394
CONN.
SDIO
CONN.
PCMCIA
Slot 0
Transformer
3.3V 33MHz
+5VCD
+CBS_VCC
& RJ45
USB2.0
+5VS
+AUD_VREF
page 29
+CBS_VPP
page 26
page 25
page 25
page 24
48MHz / 480Mb
USBPORT 0
JUSBP2
page 34
USBPORT 1
USBPORT 2
X BUS
BT
page 33
KB910L
USBPORT 3
JUSBP1
page 34
page 34
USBPORT 4
+5VALW
+3VALW
JUSBP1
SST39VF040
+3VS
page 31
USBPORT 5
JUSBP3
page 34
USBPORT 6
USBPORT 7
+3VALW
A
A
Int.KBD
page 32
Touch Pad
+5VS
page 32
page 32
Compal Electronics, inc.
Compal Secret Data
Security Classification
Custom
2005/03/01
2006/03/01
Title
Issued Date
Deciphered Date
SCHEMATIC, M/B LA-3091P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
Rev
401409
B
@, 09, 2006
ᑞɓ˜
Date:
Sheet
2
of
44
5
4
3
2
1
5
4
3
2
1
I2C / SMBUS ADDRESSING
Power Managment table
PCB Rev
Data
External PCI Devices
EVT-Build
0.1
DEVICE
IDSEL #
REQ/GNT #
PIRQ
Signal
DVT-Build
0.2
LAN
CARD BUS
AD17
AD20
0
F
+12VALW
+12V
+CPU_CORE
+VCCP
D
D
1
A
+5VALW
+5V
+5VS
PVT-Build
Cardreader
1394
B
E
+3VALW
+3V
+1.8V
+3VS
State
+2.5VS
AD16
2
+1.8VS
+1.25VS
MP-Build
Wireless LAN(MINI PCI)
AD18
3
G,H
+1.5VS
S0
ON
ON
ON
S1
ON
ON
ON
S3
ON
ON
OFF
@ Depop
1@ IBM 15R (UMA)
2@ (Discrete)
SCHEMATICS VERSION LIST
S5 S4/AC
ON
OFF
OFF
VERSION
ISSUE DATE
REMARK
S5 S4/AC don't exist
OFF
OFF
OFF
0.1
EVT-Build
C
0.2
DVT-Build
C
Ceramic Capacitor Spec
Guide:
PVT-Build
Temperature Characteristics:
3
7
Symbol
0
1
2
4
5
6
MP-Build
CODE
Z5U
Z5V
Z5P
Y5U
Y5V
Y5P
X5R
X7R
8
A
C
9
B
F
D
E
G
NP0
C0G
BJ
CH
CJ
CK
SH
SJ
H
I
J
UJ
UK
SL
Tolerance:
A
F
G
H
Symbol
B
C
D
J
B
+-0.5PF
+-1PF
+-2%
+-3%
B
CODE
+-0.05PF
+-0.1PF
+-0.25PF
+-5%
N
P
Z
K
M
Q
V
X
+-10%
+-20%
+-30%
+100,-0%
+20,-10%
+40,-20%
+80,-20%
+30,-10%
SMBUS Control Table
THERMAL
SOURCE
BATT
SERIAL
SENSOR
CPU
Intel
PCI WLAN
SO-DIMM1 CLK CHIP
LCD
EEPROM
SO-DIMM2
(ADM1032)
SMB_EC_CK1
SMB_EC_DA1
KB910L
PU +5VALW
SMB_EC_CK2
KB910L
SMB_EC_DA2
PU +5VALW
A
A
ICH_SMBCLK
ICH_SMBDATA
ICH6-M
PU +3VALW
PU +3VS
LCD_CLK
LCD_DAT
Alviso
GM-GP
Compal Electronics, inc.
Compal Secret Data
Security Classification
PU +2.5VS
PU +3VS
2005/03/01
2006/03/01
Title
Issued Date
Deciphered Date
SCHEMATIC, M/B LA-3091P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
Rev
Custom
401409
B
@, 09, 2006
ᑞɓ˜
Date:
Sheet
3
of
44
5
4
3
2
1
5
4
3
2
1
ACIN
+3/5/12VALW
32ms
D
D
ON/OFF#
t<=10
ms
8.5/2.44/3.792ms
EC_ON#
112ms
t=100 ms
PWRBTN_OUT#
8.4ms
SYSON
3V(370us)5V (450us) 1.8V(1.3ms)
+1.8/3/5/12V
RSMRST#
C
C
164us
SLP_S3/4/5#
216ms
SUSP#
t>0
1.25VS(140us) 1.5VS(2.8ms) 3VS(7.44ms) 5VS(11.3ms) 1.8VS(5.48ms)
+1.25/1.5/1.8/3/5VS
+VCCP
210us
1.3ms PGD
9.2ms
VR_ON#
CPU_VID
B
B
+CPU_CORE
960us
Vgate
1.820ms
t<110 ms
99ms
ICHPWRGD
2<t<3 RTCCLK
PCIRST/PLTRST#
1.036ms
61us
CPU_RST#
A
A
Compal Electronics, inc.
Compal Secret Data
Security Classification
2005/03/01
2006/03/01
Title
Issued Date
Deciphered Date
SCHEMATIC, M/B LA-3091P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
Rev
Custom
401409
B
@, 09, 2006
ᑞɓ˜
Date:
Sheet
4
of
44
5
4
3
2
1
5
4
3
2
1
This shall place near CPU
JCPU1A
8
H_A#[3..31]
H_D#[0..63] 8
+3V
H_A#3
Dothan
H_D#0
Test pad as closed as posible
P4
A19
A3#
D0#
H_A#4
H_D#1
ITP_DBRESET#
U4
A25
1
2
A4#
D1#
H_A#5
H_D#2
R79
150_0402_5%
V3
A22
A5#
D2#
H_A#6
H_D#3
R3
B21
A6#
D3#
H_A#7
H_D#4
ITP_DBRESET#
V2
A24
PAD
T7
A7#
D4#
H_A#8
H_D#5
W1
B26
A8#
D5#
+VCCP
H_A#9
H_D#6
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
T4
A21
PAD
T6
A9#
D6#
H_A#10
W2
B20
H_D#7
A10#
D7#
D
H_A#11
H_D#8
ITP_TDO
D
Y4
C20
1
2
PAD
T8
A11#
D8#
H_A#12
Y1
B24
H_D#9
R90
54.9_0603_1%
A12#
D9#
H_A#13
H_D#10
H_RESET#
U1
D24
1
2
PAD
T10
A13#
D10#
H_A#14
AA3
E24
H_D#11
R76
54.9_0603_1%
A14#
D11#
H_A#15
H_D#12
Place near JITP 0.5"
ITP_BPM#3
ITP_BPM#5
Y3
C26
1
2
PAD
T9
A15#
D12#
H_A#16
H_D#13
R745
56_0402_5%
AA2
B23
A16#
D13#
H_A#17
H_D#14
ITP_BPM#4
AF4
E23
PAD
T12
A17#
D14#
H_A#18
H_D#15
H_D#17
R74
22.6_0402_1%
AC4
C25
A18#
D15#
H_A#19
H_D#16
ITP_BPM#5
AC7
H23
PAD
T11
A19#
D16#
H_A#20
H_RESET#
AC3
G25
1
2
PAD
T4
A20#
D17#
+VCCP
H_A#21
H_D#18
ITP_TCK
AD3
L23
PAD
T17
A21#
D18#
H_A#22
H_D#19
or 39.4Ohm
AE4
M26
A22#
D19#
H_A#23
H_D#20
R87
22.6_0402_1%
CLK_ITP_R#
ITP_TMS
AD2
H24
1
2
PAD
T42
A23#
D20#
H_A#24
H_D#21
CLK_ITP_R
R479
37.4_0402_1%
AB4
F25
PAD
T19
A24#
D21#
ADDR GROUP
DATA GROUP
H_A#25
AC6
G24
H_D#22
ITP_TDO
1
2
PAD
T15
A25#
D22#
H_A#26
H_D#23
ITP_TDI
AD5
J23
1
2
A26#
D23#
H_A#27
AE2
M23
H_D#24
R85
150_0402_5%
A27#
D24#
H_A#28
H_D#25
AD6
J25
A28#
D25#
H_A#29
H_D#26
ITP_TRST#
AF3
L26
A29#
D26#
PAD
T16
H_A#30
H_D#27
ITP_TMS
ITP_TRST#
AE1
N24
1
2
PAD
T13
A30#
D27#
H_A#31
H_D#28
ITP_TDI
R100
680_0402_5%
AF1
M25
8
H_REQ#[0..4]
A31#
D28#
PAD
T14
H_D#29
H26
D29#
H_REQ#0
H_D#30
ITP_TCK
R2
N25
1
2
REQ0#
D30#
H_REQ#1
H_D#31
R106
27.4_0402_1%
P3
K25
Check ITP connector.
REQ1#
D31#
H_REQ#2
H_D#32
T2
Y26
REQ2#
D32#
H_REQ#3
H_D#33
P1
AA24
REQ3#
D33#
H_REQ#4
H_D#34
T1
T25
REQ4#
D34#
CLK_ITP_R#
H_D#35
1
R110
2
0_0402_5%
@
U23
D35#
CLK_ITP_R
H_ADSTB#0
H_D#36
1
2
U3
V23
8
H_ADSTB#0
ADSTB0#
D36#
R112
0_0402_5%
@
H_ADSTB#1
AE5
R24
H_D#37
CPU HOT
8
H_ADSTB#1
ADSTB1#
D37#
H_D#38
R26
D38#
+VCCP
R23
H_D#39
+3VS
D39#
C
CLK_ITP
R111
@
0_0402_5%
CPU_CK_ITP
H_D#40
C
1
2
A16
AA23
17
CLK_ITP
ITP_CLK0
D40#
CLK_ITP#
R109
@
0_0402_5%
CPU_CK_ITP#
H_D#41
1
2
A15
U26
17
CLK_ITP#
ITP_CLK1
D41#
H_D#42
V24
D42#
CLK_CPU_BCLK
H_D#43
R132
1K_0402_5%
B15
U25
17
CLK_CPU_BCLK
BCLK0
D43#
CLK_CPU_BCLK#
HOST CLK
H_D#44
B14
V26
17
CLK_CPU_BCLK#
BCLK1
D44#
H_D#45
Y23
D45#
H_D#46
R123
56_0402_5%
R124
56_0402_5%
AA26
D46#
H_D#47
Y25
D47#
H_ADS#
H_D#48
N2
AB25
8
H_ADS#
ADS#
D48#
PROCHOT# 31
H_BNR#
H_D#49
L1
AC23
8
H_BNR#
BNR#
D49#
H_BPRI#
J3
AB24
H_D#50
C
8
H_BPRI#
BPRI#
D50#
H_BR0#
H_D#51
Q6
2SC2411KT146_SC59
N4
AC20
2
8
H_BR0#
BR0#
D51#
H_DEFER#
L4
AC22
H_D#52
B
8
H_DEFER#
DEFER#
D52#
H_DRDY#
H_D#53
E
H2
AC25
8
H_DRDY#
DRDY#
D53#
H_HIT#
H_D#54
H_PROCHOT#
K3
AD23
8
H_HIT#
HIT#
D54#
R78
56_0402_5%
H_HITM#
H_LOCK#
CONTROL GROUP
H_D#55
K4
AE22
8
H_HITM#
HITM#
D55#
H_IERR#
H_D#56
+VCCP
1
2
A4
AF23
IERR#
D56#
H_D#57
J2
AD24
8
H_LOCK#
LOCK#
D57#
H_RESET#
H_D#58
B11
AF20
8
H_RS#[0..2]
H_RESET#
RESET#
D58#
H_D#59
AE21
D59#
H_D#60
AD21
8
D60#
H_RS#0
H_D#61
H1
AF25
CPU Thermal Sensor
RS0#
D61#
+3VS
H_RS#1
H_D#62
K1
AF22
RS1#
D62#
H_RS#2
H_D#63
L2
AF26
RS2#
D63#
H_TRDY#
M3
8
H_TRDY#
TRDY#
1
C132
0.1U_0603_25V7K
D25
H_DINV#0 8
H_DINV#1 8
H_DINV#2 8
DINV0#
J26
DINV1#
ITP_BPM#0
C8
T24
BPM0#
DINV2#
2
ITP_BPM#1
B8
AD20
BPM1#
DINV3#
H_DINV#3 8
H_DSTBN#[0..3] 8
ITP_BPM#2
R149
10K_0402_5%
A9
BPM2#
Add pullups for PWRGOOD and
THERMTRIP per INTEL
ITP_BPM#3
H_THERMDA
C9
BPM3#
B
H_DSTBN#0
U9
B
C23
1
DSTBN0#
ITP_DBRESET#
H_DPSLP#
H_DSTBN#1
C141
2200P_0402_50V7K
A7
K24
2
1
DBR#
DSTBN1#
D+
VDD1
H_DBSY#
H_DSTBN#2
M2
W25
8
H_DBSY#
DBSY#
DSTBN2#
H_DSTBN#3
H_THERMDC
B7
AE24
3
6
19
H_DPSLP#
H_DSTBP#[0..3] 8
DPSLP#
DSTBN3#
2
D-
ALERT#
H_PWRGOOD
H_DPRSLP#
H_DSTBP#0
1
2
G1
C22
+VCCP
19
H_DPRSLP#
DPRSTP#
DSTBP0#
R458
200_0402_5%
H_DSTBP#1
SMB_EC_CK2
SMB_EC_DA2
C19
L24
8
4
8
H_DPWR#
15,27,31
SMB_EC_CK2
DPWR#
DSTBP1#
SCLK
THERM#
MISC
ITP_BPM#4
H_PROCHOT#
A10
W24
H_DSTBP#2
PRDY#
DSTBP2#
ITP_BPM#5
H_DSTBP#3
B10
AE25
7
5
15,27,31
SMB_EC_DA2
PREQ#
DSTBP3#
SDATA
GND
B17
PROCHOT#
H_PWRGOOD
ADM1032ARMZ_RM8
E4
19
H_PWRGOOD
PWRGOOD
H_CPUSLP#
A6
8,19
H_CPUSLP#
SLP#
ITP_TCK
A13
TCK
ITP_TDI
H_A20M#
H_IGNNE#
C12
C2
TDI
A20M#
H_A20M# 19
H_FERR# 19
H_IGNNE# 19
H_INIT# 19
H_INTR 19
H_NMI 19
TEST2
ITP_TDO
H_FERR#
1
2
A12
D3
TDO
FERR#
R530
@
1K_0402_5%
TEST1
TEST2
C5
A3
T5
PAD
TEST1
IGNNE#
+VCCP
+CPU_CORE
TEST1
H_INIT#
1
2
F23
B5
T39 PAD
TEST2
INIT#
R464
@
1K_0402_5%
ITP_TMS
H_INTR
C11
D1
TMS
LINT0
ITP_TRST#
H_NMI
B13
D4
TRST#
LINT1
LEGACY CPU
R561
47K_0402_5%
@
R762
47K_0402_5%
THERMAL
DIODE
H_THERMDA
B18
C6
H_STPCLK#
THERMDA
STPCLK#
H_STPCLK#
19
MAINPWRON 36,38,41
H_THERMDC
H_THERMTRIP#
H_SMI#
A18
B4
H_SMI#
19
THERMDC
SMI#
C17
8,19
H_THERMTRIP#
THERMTRIP#
C
Q39
2SC2411KT146_SC59
1
2
2
TYCO_1612365-1_Dothan
B
C526
0.68U_0603_10V6K
@
E
R494
75_0402_1%
1
A
A
2
+VCCP
H_THERMTRIP#
Custom
Compal Electronics, inc.
Compal Secret Data
Security Classification
2005/03/01
2006/03/01
Title
Issued Date
Deciphered Date
SCHEMATIC, M/B LA-3091P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
Rev
401409
B
@, 09, 2006
ᑞɓ˜
Date:
Sheet
5
of
44
5
4
3
2
1
Plik z chomika:
vanthi
Inne pliki z tego folderu:
HEL00 - Parts List.pdf
(65 KB)
HEL00 - Schematics.pdf
(988 KB)
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