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Window Discriminator
TCA 965 B
Preliminary
Bipolar IC
Features
l
Two window settings
– direct setting of lower and upper edge
voltage (window edges)
– indirect setting by window center
voltage and half window width
l
Adjustable hysteresis
l
Digital outputs with open collectors
for currents up to 50 mA
P-DIP-14-1
l
Adjustable reference voltage V Stab
Type
Ordering Code
Package
n
TCA 965 B
Q67000-A8338
P-DIP-14-1
n
Not for new design
The window discriminator compares an input voltage to a defined voltage window. The
digital outputs show whether the input voltage is below, within or above this window.
The TCA 965 B window discriminator is especially suitable as a tracking or
compensating controller with a dead band in control engineering and for the selection of
DC voltages within a certain tolerance of the required setpoint value in measurement
engineering. When it is used as a Schmitt trigger, switching frequencies up to a typical
value of 50 kHz are possible.
Semiconductor Group
1
1998-02-10
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TCA 965 B
Functional Description
Amplifier Amp 3 increases the voltage of the reference source R to V Stab = 2 x V REF . The
amplification factor can be altered by external wiring. With direct setting of the window,
the input voltage appears on amplifier Amp 1 ( V 8 ), the upper edge voltage on
comparator K2 ( V 6 ) and the lower edge voltage on comparator K1 ( V 7 ).
With indirect setting of the window, the input voltage appears on inputs V 6 and V 7 , while
the center voltage is connected to amplifier A1 ( V 8 ).
The voltage applied to the input ( V 9 ) of amplifier Amp 2 is subtracted symmetrically from
the output voltage of amplifier Amp 1 and added. The comparators switch with
hysteresis. The logic gates have open-collector outputs.
If the inhibit input A or B is connected to ground, output A or B will always be high.
+V
S
V REF
11
1
5
20 k
W
20 k
W
_
+
Amp 3
10
V Stab
R
V 7
7
+
1
2
_
K1
A
_
+
4
Inhibit A
Amp 1
1
13
C
V 8
8
1
3
D
V = 1
Amp 2
12
Inhibit B
V 9
9
+
+
1
14
K2
B
_
_
V = 1
6
V 6
IEB00091
Outputs A, B, C, D are open-collector
Block Diagram
Semiconductor Group
2
1998-02-10
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TCA 965 B
Pin Configuration
(top view)
TCA 965 B
GND
1
14
B
A
2
13
C
D
3
12
Inhibit B
Inhibit A
4
11
+
V S
V
REF
5
10
V Stab
V
6
9
V 9
V
7
8
V 8
IEP00292
Pin Definitions and Functions
Pin
Symbol
Pin Function in
Direct Setting
Indirect Setting
of Window
1
2
3
4
5
GND
A
D
Inhibit A
V REF
GND
Logic output A
Logic output D = A @ B (AND)
Connected to GND: logic output A = HIGH
Internal V REF = 3 V
6
7
8
9
V 6
V 7
V 8
V 9
Upper edge voltage
Lower edge voltage
Input voltage
GND
Input voltage V 6/7
Input voltage V 6/7
Center voltage
Half window width
10
11
12
13
14
V Stab
+ V S
Inhibit B
C
B
Internal V Stab = 6 V
Supply voltage
Connected to GND: logic output B = HIGH
Logic output C = A @ B (NAND)
Logic output B
Semiconductor Group
3
1998-02-10
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TCA 965 B
Absolute Maximum Ratings
Maximum ratings for ambient temperature T A = – 25 to 85 ° C
Parameter
Symbol
Limit Values
Unit
min.
max.
Supply voltage (pin 11)
Difference in input voltage between pins 6, 7, 8
Input voltage (pins 6, 7, 8, 9)
V S
V I
V I
–
–
–
30
15
30
V
V
V
Output current (pins 2, 3, 13, 14)
I Q
–
50
mA
Output voltage (pins 2, 3, 13, 14)
independent of V S
Voltage on V REF (pin 5)
V Q
V R
–
–
–
30
8
V
V
Output current of stabilized voltage (pin 10)
I 10
–
10
mA
Inhibit input voltage (pins 4, 12)
V IH
–
7
V
Junction temperature
Storage temperature
T j
T stg
–55
150
125
° C
°
C
Thermal resistance system - air P-DIP-14-1
R th SA
–
80
K/W
Operating Range
Supply voltage
V S
4.5
30
V
Ambient temperature
T A
–25
85
°
C
Semiconductor Group
4
1998-02-10
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TCA 965 B
Characteristics
V S = 10 V; T A = 25 ° C
Parameter
Symbol
Limit Values Unit Test
Condition
Test
Circuit
min. typ. max.
Current consumption
Input current
(pins 6, 7, 8)
Input current, pin 9
I S
–
5
7
mA
V 2 , V 13 = V QH 1
I I
– I I
–
–
20
400
50
3000
nA
nA
1
1
Input offset voltage in
direct setting of window
Input offset voltage in
indirect setting of window
Input-voltage range on
pins 6, 7, 8
Input-voltage range on
pin 9
Differential input voltage
V IO
–20
20
mV
1
V IO
–50
50
mV
2
V I
1.5
V S –1
V
D V I <13V
1
V I
V 6 –( V 8 – V 9 )
( V 8 + V 9 )– V 7
50
V S /2
13
13
mV
V
V
2
Reference voltage
Stabilized voltage on
pin 10
TC of reference voltage
Sensitivity of reference
voltage to supply-voltage
variation
V 5
2.8
3
3.2
V
I REF = 0
V 10
a V 5
5.5
6
0.4
6.5
V
mV/K
V S > 7.9 V
D V 5 / D V S
2
mV/V
Output reverse current
I QH
––0
m
A–
–
Output saturation voltage
V QL
100
500
200
800
mV
mV
I Q = 10 mA
I Q = 50 mA
1
Hysteresis of window
edges
Inhibit threshold
V U – V L
V 4, 12
18
1
22
35
1.8
mV
V
Inhibit current
I 4, 12
–
– 100 –
m
A–
–
Switching frequency
f dir
f ind
–
–
20
50
–
–
kHz
kHz
–
–
1
2
Semiconductor Group
5
1998-02-10
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