AD620.pdf
(
436 KB
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Pobierz
Low Cost Low Power
Instrumentation Amplifier
AD620
FEATURES
Easy to use
Gain set with one external resistor
(Gain range 1 to 10,000)
Wide power supply range (±2.3 V to ±18 V)
Higher performance than 3 op amp IA designs
Available in 8-lead DIP and SOIC packaging
Low power, 1.3 mA max supply current
Excellent dc performance (B grade)
50 μV max, input offset voltage
0.6 μV/°C max, input offset drift
1.0 nA max, input bias current
100 dB min common-mode rejection ratio (G = 10)
Low noise
9 nV/√Hz @ 1 kHz, input voltage noise
0.28 μV p-p noise (0.1 Hz to 10 Hz)
Excellent ac specifications
120 kHz bandwidth (G = 100)
15 μs settling time to 0.01%
CONNECTION DIAGRAM
1
8
R
G
+V
S
R
G
–IN
2
7
+IN
3
6
OUTPUT
–V
S
4
AD620
5
REF
TOP VIEW
Figure 1. 8-Lead PDIP (N), CERDIP (Q), and SOIC (R) Packages
PRODUCT DESCRIPTION
The
AD620
is a low cost, high accuracy instrumentation
amplifier that requires only one external resistor to set gains of
1 to 10,000. Furthermore, the
AD620
features 8-lead SOIC and
DIP packaging that is smaller than discrete designs and offers
lower power (only 1.3 mA max supply current), making it a
good fit for battery-powered, portable (or remote) applications.
The
AD620
, with its high accuracy of 40 ppm maximum
nonlinearity, low offset voltage of 50 μV max, and offset drift of
0.6 μV/°C max, is ideal for use in precision data acquisition
systems, such as weigh scales and transducer interfaces.
Furthermore, the low noise, low input bias current, and low power
of the
AD620
make it well suited for medical applications, such
as ECG and noninvasive blood pressure monitors.
APPLICATIONS
Weigh scales
ECG and medical instrumentation
Transducer interface
Data acquisition systems
Industrial process controls
Battery-powered and portable equipment
The low input bias current of 1.0 nA max is made possible with
the use of Superϐeta processing in the input stage. The
AD620
works well as a preamplifier due to its low input voltage noise of
9 nV/√Hz at 1 kHz, 0.28 μV p-p in the 0.1 Hz to 10 Hz band,
and 0.1 pA/√Hz input current noise. Also, the
AD620
is well
suited for multiplexed applications with its settling time of 15 μs
to 0.01%, and its cost is low enough to enable designs with one
in-amp per channel.
Table 1. Next Generation Upgrades for AD620
Part
30,000
Comment
25,000
3 OP AMP
IN-AMP
(3 OP-07s)
AD8221
Better specs at lower price
AD8222
Dual channel or differential out
20,000
AD8226
Low power, wide input range
15,000
AD8220
JFET input
AD620A
AD8228
Best gain accuracy
10,000
R
G
AD8295
+2 precision op amps or differential out
AD8429
Ultra low noise
5,000
0
0
5
10
15
20
SUPPLY CURRENT (mA)
Figure 2. Three Op Amp IA Designs vs. AD620
Rev.
H
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703© 2003–2011 Analog Devices, Inc. All rights reserved.
AD620
TABLE OF CONTENTS
Specifications .....................................................................................3
RF Interference ............................................................................15
Absolute Maximum Ratings ............................................................5
Common-Mode Rejection.........................................................16
ESD Caution ..................................................................................5
Grounding....................................................................................16
Typical Performance Characteristics ..............................................6
Ground Returns for Input Bias Currents .................................17
Theory of Operation .......................................................................12
AD620ACHIPS Information .........................................................18
Gain Selection..............................................................................15
Outline Dimensions........................................................................19
Input and Output Offset Voltage ..............................................15
Ordering Guide ...........................................................................20
Reference Terminal .....................................................................15
Input Protection ..........................................................................15
REVISION HISTORY
7/11—Rev. G to Rev. H
Changes to Input Protection section ............................................15
Deleted Figure 9 ..............................................................................15
Changes to RF Interference section ..............................................15
Edit to Ground Returns for Input Bias Currents section...........17
Added AD620CHIPS to Ordering Guide ....................................19
Deleted Figure 3.................................................................................1
Added Table 1 ....................................................................................1
Moved Figure 2 ..................................................................................1
Added ESD Input Diodes to Simplified Schematic ....................12
Changes to Input Protection Section............................................15
Added Figure 41; Renumbered Sequentially ...............................15
Changes to AD620ACHIPS Information Section ......................18
Updated Ordering Guide ...............................................................20
7/03—Data Sheet Changed from Rev. E to Rev. F
Edit to FEATURES............................................................................ 1
Changes to SPECIFICATIONS ....................................................... 2
Removed AD620CHIPS from ORDERING GUIDE ................... 4
Removed METALLIZATION PHOTOGRAPH........................... 4
Replaced TPCs 1–3 ........................................................................... 5
Replaced TPC 12 ............................................................................... 6
Replaced TPC 30 ............................................................................... 9
Replaced TPCs 31 and 32...............................................................10
Replaced Figure 4 ............................................................................10
Changes to Table I ...........................................................................11
Changes to Figures 6 and 7 ............................................................12
Changes to Figure 8 ........................................................................13
Edited INPUT PROTECTION section ........................................13
Added new Figure 9 ........................................................................13
Changes to RF INTERFACE section ............................................14
Edit to GROUND RETURNS FOR INPUT BIAS CURRENTS
section...............................................................................................15
Updated OUTLINE DIMENSIONS .............................................16
12/04—Rev. F to Rev. G
Updated Format.................................................................. Universal
Change to Features ............................................................................1
Change to Product Description.......................................................1
Changes to Specifications.................................................................3
Added Metallization Photograph....................................................4
Replaced Figure 4-Figure 6 ..............................................................6
Replaced Figure 15 ............................................................................7
Replaced Figure 33 ..........................................................................10
Replaced Figure 34 and Figure 35 .................................................10
Replaced Figure 37 ..........................................................................10
Changes to Table 3 ..........................................................................13
Changes to Figure 41 and Figure 42 .............................................14
Changes to Figure 43 ......................................................................15
Change to Figure 44 ........................................................................17
Rev. H | Page 2 of 20
AD620
SPECIFICATIONS
Typical @ 25°C, V
S
= ±15 V, and R
L
= 2 kΩ, unless otherwise noted.
Table 2.
AD620A
AD620B
AD620
S
1
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
GAIN
G = 1 + (49.4 kΩ/R
G
)
Gain Range
1
10,000
1
10,000
1
10,000
Gain Erro
r
2
V
OUT
= ±10 V
G = 1
0.03
0.10
0.01
0.02
0.03
0.10
%
G = 10
0.15
0.30
0.10
0.15
0.15
0.30
%
G = 100
0.15
0.30
0.10
0.15
0.15
0.30
%
G = 1000
0.40
0.70
0.35
0.50
0.40
0.70
%
Nonlinearity
V
OUT
= −10 V to +10 V
G = 1–1000
R
L
= 10 kΩ
10
40
10
40
10
40
ppm
G = 1–100
R
L
= 2 kΩ
10
95
10
95
10
95
ppm
Gain vs. Temperature
G = 1
10
10
10
ppm/°C
Gain >
1
2
−50
−50
−50
ppm/°C
VOLTAGE OFFSET
(Total RTI Error = V
OSI
+ V
OSO
/G)
Input Offset, V
OSI
V
S
= ±5 V
to ± 15 V
30
125
15
50
30
125
μV
Overtemperature
V
S
= ±5 V
to ± 15 V
185
85
225
μV
Average TC
V
S
= ±5 V
to ± 15 V
0.3
1.0
0.1
0.6
0.3
1.0
μV/°C
Output Offset, V
OSO
V
S
= ±15 V
400
1000
200
500
400
1000
μV
V
S
= ± 5 V
1500
750
1500
μV
Overtemperature
V
S
= ±5 V
to ± 15 V
2000
1000
2000
μV
Average TC
V
S
= ±5 V
to ± 15 V
5.0
15
2.5
7.0
5.0
15
μV/°C
Offset Referred to the
Input vs. Supply (PSR)
V
S
= ±2.3 V
to ±18 V
G = 1
80
100
80
100
80
100
dB
G = 10
95
120
100
120
95
120
dB
G = 100
110
140
120
140
110
140
dB
G = 1000
110
140
120
140
110
140
dB
INPUT CURRENT
Input Bias Current
0.5
2.0
0.5
1.0
0.5
2
nA
Overtemperature
2.5
1.5
4
nA
Average TC
3.0
3.0
8.0
pA/°C
Input Offset Current
0.3
1.0
0.3
0.5
0.3
1.0
nA
Overtemperature
1.5
0.75
2.0
nA
Average TC
1.5
1.5
8.0
pA/°C
INPUT
Input Impedance
Differential
10||2
10||2
10||2
GΩ_pF
Common-Mode
10||2
10||2
10||2
GΩ_pF
V
S
= ±2.3 V
to ±5 V
−V
S
+ 1.9
+V
S
− 1.2
−V
S
+ 1.9
+V
S
− 1.2
−V
S
+ 1.9
+V
S
− 1.2
V
Input Voltage Rang
e
3
Overtemperature
−V
S
+ 2.1
+V
S
− 1.3
−V
S
+ 2.1
+V
S
− 1.3
−V
S
+ 2.1
+V
S
− 1.3
V
V
S
= ± 5 V
to ±18 V
−V
S
+ 1.9
+V
S
− 1.4
−V
S
+ 1.9
+V
S
− 1.4
−V
S
+ 1.9
+V
S
− 1.4
V
Overtemperature
−V
S
+ 2.1
+V
S
− 1.4
−V
S
+ 2.1
+V
S
+ 2.1
−V
S
+ 2.3
+V
S
− 1.4
V
Rev. H | Page 3 of 20
AD620
AD620A
AD620B
AD620S
1
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Common-Mode Rejection
Ratio DC to 60 Hz with
1 kΩ Source Imbalance
V
CM
= 0 V to ± 10 V
G = 1
73
90
80
90
73
90
dB
G = 10
93
110
100
110
93
110
dB
G = 100
110
130
120
130
110
130
dB
G = 1000
110
130
120
130
110
130
dB
OUTPUT
Output Swing
R
L
= 10 kΩ
V
S
= ±2.3 V
to ± 5 V
−V
S
+
1.1
+V
S
− 1.2
−V
S
+ 1.1
+V
S
− 1.2
−V
S
+ 1.1
+V
S
− 1.2
V
Overtemperature
−V
S
+ 1.4
+V
S
− 1.3
−V
S
+ 1.4
+V
S
− 1.3
−V
S
+ 1.6
+V
S
− 1.3
V
V
S
= ±5 V
to ± 18 V
−V
S
+ 1.2
+V
S
− 1.4
−V
S
+ 1.2
+V
S
− 1.4
−V
S
+ 1.2
+V
S
− 1.4
V
Overtemperature
−V
S
+ 1.6
+V
S
– 1.5
−V
S
+ 1.6
+V
S
– 1.5
–V
S
+ 2.3
+V
S
– 1.5
V
Short Circuit Current
±18
±18
±18
mA
DYNAMIC RESPONSE
Small Signal –3 dB Bandwidth
G = 1
1000
1000
1000
kHz
G = 10
800
800
800
kHz
G = 100
120
120
120
kHz
G = 1000
12
12
12
kHz
Slew Rate
0.75
1.2
0.75
1.2
0.75
1.2
V/μs
Settling Time to 0.01%
10 V Step
G = 1–100
15
15
15
μs
G = 1000
150
150
150
μs
NOISE
Voltage Noise, 1 kHz
2
2
Total
RTI
Noise
=
(
e
ni
+
)
(
e
/
G
)
no
Input, Voltage Noise, e
ni
9
13
9
13
9
13
nV/√Hz
72
100
72
100
72
100
nV/√Hz
Output, Voltage Noise, e
no
RTI, 0.1 Hz to 10 Hz
G = 1
3.0
3.0
6.0
3.0
6.0
μV p-p
G = 10
0.55
0.55
0.8
0.55
0.8
μV p-p
G = 100–1000
0.28
0.28
0.4
0.28
0.4
μV p-p
Current Noise
f = 1 kHz
100
100
100
fA/√Hz
0.1 Hz to 10 Hz
10
10
10
pA p-p
REFERENCE INPUT
R
IN
20
20
20
kΩ
I
IN
V
IN+
, V
REF
= 0
50
60
50
60
50
60
μA
Voltage Range
−V
S
+ 1.6
+V
S
− 1.6
−V
S
+ 1.6
+V
S
− 1.6
−V
S
+ 1.6
+V
S
− 1.6
V
Gain to Output
1 ± 0.0001
1 ± 0.0001
1 ± 0.0001
POWER SUPPLY
±2.3
±18
±2.3
±18
±2.3
±18
V
Operating Rang
e
4
Quiescent Current
V
S
= ±2.3 V
to ±18 V
0.9
1.3
0.9
1.3
0.9
1.3
mA
Overtemperature
1.1
1.6
1.1
1.6
1.1
1.6
mA
TEMPERATURE RANGE
For Specified Performance
−40 to +85
−40 to +85
−55 to +125
°C
1
See Analog Devices military data sheet for 883B tested specifications.
2
Does not include effects of external resistor R
G
.
3
One input grounded. G = 1.
4
This is defined as the same supply range that is used to specify PSR.
Rev. H | Page 4 of 20
AD620
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rating
Supply Voltage
±18 V
Internal Power Dissipation
1
650 mW
Input Voltage (Common-Mode)
±V
S
Differential Input Voltage
25 V
Output Short-Circuit Duration
Indefinite
Storage Temperature Range (Q)
−65°C to +150°C
Storage Temperature Range (N, R)
−65°C to +125°C
Operating Temperature Range
AD620 (A, B)
−40°C to +85°C
ESD CAUTI
ON
AD620 (S)
−55°C to +125°C
Lead Temperature Range
(Soldering 10 seconds)
300°C
1
Specification is for device in free air:
8-Lead Plastic Package: θ
JA
= 95°C
8-Lead CERDIP Package: θ
JA
= 110°C
8-Lead SOIC Package: θ
JA
= 155°C
Rev. H | Page 5 of 20
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