flash K9F2G08U0A_rev.1.13 .pdf

K9F2G08R0A

FLASH MEMORY

K9F2G08UXA

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

TO ANY INTELLECTUAL PROPERTY RIGHTS I N SAMSUNG PRODUCTS OR TECHNOLOGY. ALL

INFORMATION IN THIS DOCUMENT IS PROVIDED

ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life s upport, critical care, medical, safety equipment, or similar

applica t ions where Product failure could result in loss of life or personal or physical harm, or any military or

defense application, or any governmental procureme n t to which special terms or provisions may apply.

* S ams u ng E le ctro ni cs r es erve s the ri ght t o chan g e pr o duct s or s pe cific at ion wi thou t notic e .

K9 F 2G 0 8U0A

K9F2G08R0A

FLASH MEMORY

Document Title

256M x 8 Bit NAND Flash Memory

Revision History

Revision No

History

Draft Date

Remark

0.0

1. Initial issue

Nov. 09. 2005

Advance

0.1

1. 1.8V part is added.

2. tRHW, tCSD parameter is defined.

3. 4G DDP LGA part is deleted.

4. Technical note is added.(p.18)

Mar. 17th. 06

Advance

0.2

1. FBGA package size is changed

2. 1.8V TSOP is deleted

May 25th 2006

Preliminary

0. 3

1. 1.8V Ioh/Iol condition is changed

2. Min. tADL @ 3.3V is changed form 70n s to 100ns

June 1st 2006

Preliminary

0.4

1. 1.8V device supports Copy-Back Program

June 29th 2006

Preliminary

1.0

Aug 23th 2006

Final

1. 1

1. 1.8V AC timing is changed

2. tRPB/tRCB/tREAB is added for 1.8V device

Jan. 15th 2007

1.2

1. tCSD is changed.(10ns -> 0ns)

Mar. 15th 2007

1. 3

1. tCS 31ns -> 25ns, tREH 15ns -> 10ns (@ 1.8V)

June 4th 2007

The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right

to change th e specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have

any q uesti on s, ple as e co nta ct th e SAMS U NG b ra nch o ffi ce ne ar your o ffice.

K9 F 2G 0 8U0A

K9F2G08R0A

FLASH MEMORY

2 56M x 8 Bit NAND Flash Memory

PRODUCT LIST

Part Number

Vcc Range

Organization

PKG Type

K9F 2 G08R0A-J

1.65 ~ 1.95V

FBGA

K9F2G08U0A-P

2.70 ~ 3.60V

TSOP1

K9F 2 G08U0A-I

52ULGA

FEATURES

• Voltage Supply

- 1.65V ~ 1.95V

- 2.70V ~ 3. 6 0V

• Organization

- Memory Cell Array : (256M + 8M) x 8bit

- Data Regi s ter : (2K + 64) x 8bit

• Automatic Program and Erase

- Page Program : (2K + 64)Byte

- Block Erase : (128K + 4K)Byte

• Page Read Operation

- Page Size : (2K + 64)Byte

- Random Read : 25 µ s(Max.)

- Serial Access : 25ns(Min.)

(*K9F2G08R0A: tRC = 42ns(Min))

• Fast Write Cycle Time

- Page Program time : 200 µ s(Typ.)

- Block Erase Time : 1.5ms(Typ.)

• Command/Address/Data Multiplexed I/O Port

• Hardware Data Protection

- Program/Erase Lockout During Power Transitions

• Reliable CMOS Floating-Gate Technology

-Endurance : 100K Program/Erase Cycles ( with 1bit/512Byte

ECC)

- Data Retention : 10 Years

• Command Driven Operation

• Intelligent Copy-Back with internal 1bit/528Byte EDC

• Unique ID for Copyright Protection

• Package :

- K9F2G08R0A-JCB0/JIB0 : Pb-FREE PACKAGE

63 - Ball FBGA I (10 x 13 / 0.8 mm pitch)

- K9F2G08U0A-PCB0/PIB0 : Pb-FREE PACKAGE

48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)

- K9F2G08U0A-ICB0/IIB0

52 - Pin ULGA (12 x 17 / 1.00 mm pitch)

GENERAL DESCRIPTION

Offered in 256Mx8bit, the K9F2G08X0A is a 2G-bit NAND Flash Memory with spare 64M-bit. Its NAND cell provides the most cost-

effective solution for the solid state application market. A program operation can be performed in typical 200 µ s on the (2K+64)Byte

page and an erase operation can be performed in typical 1.5ms on a (128K+4K)Byte block. Data in the data register can be read out

at 25ns(42ns with 1.8V device) cycle time per Byte. The I/O pins serve as the ports for address and data input/output as well as com-

mand input. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and

internal verification and margining of data. Even the write-intensive systems can take advantage of the K9F2G08X0A ′ s extended reli-

ability of 100K program/erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The

K9F2G08X0 A is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable

app lic ation s requi rin g non -v olatil ity.

K9 F 2G 0 8U0A

K9F2G08R0A

FLASH MEMORY

P IN CON F IGURATION (TSOP1)

K9F2G08U0A-PCB 0 /PIB0

N.C

N. C

R/B

N.C

Vcc

Vss

N.C

CLE

AL WE

N.C

1 13

1 15

1 17

1 19

2 21

2 23

48-pin TSO P 1

Standard Type

12mm x 20mm

4 46

4 44

4 42

4 40

3 38

3 36

3 34

3 32

3 29

2 27

2 25

N.C

I/O7

I/O6

I/O5

I/O4

N.C

Vcc

Vss

N.C

I/O3

I/O2

I/O1

I/O0

N.C

PACKAGE DIMENSIONS

48-PIN LEAD/LEAD FREE PLASTIC THIN SMALL OUT-LINE PACKAGE TYPE(I)

48 - TSO P 1 - 1220F

Unit :mm/Inch

0.787 ± 0.008

#48

#24

#25

0.039 ± 0.002

0.002

MIN

18.40 ± 0.10

1.20 MAX

0.724 ± 0.004

0~8 °

0.45~0.75

0.018~0.030

(

0.50

0.020

)

K9 F 2G 0 8U0A

20.00 ± 0.20

1.00 ± 0.05

0.05

0.047

K9F2G08R0A

FLASH MEMORY

P IN CON F IGURATION (FBGA)

K9F2G08R0A-JCB0/JIB0

1 2

3456

N.C N.C

N.C

/WP

ALE

Vss

/CE

/WE

R/B

/RE CLE

N C

N C NC

NC NC

NC I/O0

NC Vcc

I/O1

NC Vcc I/O5 I/O7

Vss

I/O2

I/O3

I/O4

I/O6

Vss

N.C N.C

N.C

Top View

K9 F 2G 0 8U0A

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