IRF840_1.pdf

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PowerMOS transistor Avalanche energy rated
Philips Semiconductors
Product specification
Avalanche energy rated
IRF840
FEATURES
SYMBOL
QUICK REFERENCE DATA
• Repetitive Avalanche Rated
• Fast switching
d
V DSS = 500 V
• High thermal cycling performance
• Low thermal resistance
g
I D = 8.5 A
R DS(ON)
£
0.85
W
s
GENERAL DESCRIPTION
PINNING
SOT78 (TO220AB)
N-channel, enhancement mode
PIN
DESCRIPTION
field-effect power transistor,
intended for use in off-line switched
tab
1
gate
mode power supplies, T.V. and
computer monitor power supplies,
2
drain
d.c. to d.c. converters, motor control
circuits and general purpose
3
source
switching applications.
tab
drain
The IRF840 is supplied in the
SOT78 (TO220AB) conventional
leaded package.
123
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V DSS
Drain-source voltage
T j = 25 ˚C to 150˚C
-
500
V
V DGR
Drain-gate voltage
T j = 25 ˚C to 150˚C; R GS = 20 k
W
-
500
V
V GS
Gate-source voltage
-
±
30
V
I D
Continuous drain current
T mb = 25 ˚C; V GS = 10 V
-
8.5
A
T mb = 100 ˚C; V GS = 10 V
-
5.4
A
I DM
Pulsed drain current
T mb = 25 ˚C
-
34
A
P D
Total dissipation
T mb = 25 ˚C
-
147
W
T j , T stg
Operating junction and
- 55
150
˚C
storage temperature range
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
E AS
Non-repetitive avalanche
Unclamped inductive load, I AS = 7.4 A;
-
531
mJ
energy
t p = 0.22 ms; T j prior to avalanche = 25˚C;
V DD
£
50 V; R GS = 50
W
; V GS = 10 V; refer
to fig:17
E AR
Repetitive avalanche energy 1
I AR = 8.5 A; t p = 2.5
m
s; T j prior to
-
13
mJ
avalanche = 25˚C; R GS = 50
; V GS = 10 V;
refer to fig:18
I AS , I AR
Repetitive and non-repetitive
-
8.5
A
avalanche current
1 pulse width and repetition rate limited by T j max.
March 1999
1
Rev 1.000
PowerMOS transistor
W
22890114.004.png
Philips Semiconductors
Product specification
Avalanche energy rated
IRF840
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
R th j-mb
Thermal resistance junction
-
-
0.85 K/W
to mounting base
R th j-a
Thermal resistance junction in free air
-
60
-
K/W
to ambient
ELECTRICAL CHARACTERISTICS
T j = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V (BR)DSS
Drain-source breakdown
V GS = 0 V; I D = 0.25 mA
500
-
-
V
voltage
D
V (BR)DSS / Drain-source breakdown
V DS = V GS ; I D = 0.25 mA
-
0.1
-
%/K
D
T j
voltage temperature
coefficient
R DS(ON)
Drain-source on resistance V GS = 10 V; I D = 4.8 A
-
0.6 0.85
W
V GS(TO)
Gate threshold voltage
V DS = V GS ; I D = 0.25 mA
2.0
3.0
4.0
V
g fs
Forward transconductance
V DS = 30 V; I D = 4.8 A
3.5
6
-
S
I DSS
Drain-source leakage current V DS = 500 V; V GS = 0 V
-
1
25
m
A
V DS = 400 V; V GS = 0 V; T j = 125 ˚C
-
40
250
m
A
I GSS
Gate-source leakage current V GS =
±
30 V; V DS = 0 V
-
10
200
nA
Q g(tot)
Total gate charge
I D = 8.5 A; V DD = 400 V; V GS = 10 V
-
55
80
nC
Q gs
Gate-source charge
-
5.5
7
nC
Q gd
Gate-drain (Miller) charge
-
30
45
nC
t d(on)
Turn-on delay time
V DD = 250 V; R D = 30
W
;
-
18
-
ns
t r
Turn-on rise time
R G = 9.1
W
-
37
-
ns
t d(off)
Turn-off delay time
-
80
-
ns
t f
Turn-off fall time
-
36
-
ns
L d
Internal drain inductance
Measured from tab to centre of die
-
3.5
-
nH
L d
Internal drain inductance
Measured from drain lead to centre of die
-
4.5
-
nH
L s
Internal source inductance
Measured from source lead to source
-
7.5
-
nH
bond pad
C iss
Input capacitance
V GS = 0 V; V DS = 25 V; f = 1 MHz
-
960
-
pF
C oss
Output capacitance
-
140
-
pF
C rss
Feedback capacitance
-
80
-
pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
T j = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
I S
Continuous source current
T mb = 25˚C
-
-
8.5
A
(body diode)
I SM
Pulsed source current (body T mb = 25˚C
-
-
34
A
diode)
V SD
Diode forward voltage
I S = 8.5 A; V GS = 0 V
-
-
1.2
V
t rr
Reverse recovery time
I S = 8.5 A; V GS = 0 V; dI/dt = 100 A/
m
s
-
440
-
ns
Q rr
Reverse recovery charge
-
6.4
-
m
C
March 1999
2
Rev 1.000
PowerMOS transistor
22890114.005.png
Philips Semiconductors
Product specification
Avalanche energy rated
IRF840
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
1
Zth j-mb, Transient thermal impedance (K/W)
PHP6N60
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
t p
P
t p
D =
D
T
single pulse
T
t
0
20
40
60
80
100 120 140
0.001
1us
10us
100us
1ms
10ms 100ms
1s
Tmb / C
tp, pulse width (s)
Fig.1. Normalised power dissipation.
PD% = 100
×
P D /P D 25 ˚C = f(T mb )
Fig.4. Transient thermal impedance.
Z th j-mb = f(t); parameter D = t p /T
120
110
100
90
80
70
60
50
40
30
20
10
0
ID%
Normalised Current Derating
30
ID, Drain current (Amps)
PHP8N50
Tj = 25 C
25
10 V
7 V
20
6.5 V
15
6 V
10
5.5 V
5
5 V
VGS = 4.5 V
0
0
20
40
60
80
100 120 140
0
5
10
15
20
25
30
Tmb / C
VDS, Drain-Source voltage (Volts)
Fig.2. Normalised continuous drain current.
ID% = 100
×
I D /I D 25 ˚C = f(T mb ); conditions: V GS
³
10 V
Fig.5. Typical output characteristics.
I D = f(V DS ); parameter V GS
100
ID / A
BUK457-500B
2
RDS(on), Drain-Source on resistance (Ohms)
4.5 V
PHP8N50
5 V
5.5 V
VGS = 6 V Tj = 25 C
tp = 10 us
1.5
6.5 V
10
7 V
100 us
10 V
1
1 ms
1
DC
10 ms
100 ms
0.5
0.1
0
1
10
100
1000
0
5
10
15
20
25
VDS / V
ID, Drain current (Amps)
Fig.3. Safe operating area. T mb = 25 ˚C
I D & I DM = f(V DS ); I DM single pulse; parameter t p
Fig.6. Typical on-state resistance.
R DS(ON) = f(I D ); parameter V GS
March 1999
3
Rev 1.000
PowerMOS transistor
22890114.006.png 22890114.007.png
Philips Semiconductors
Product specification
Avalanche energy rated
IRF840
ID, Drain current (Amps)
PHP8N50
VGS(TO) / V
25
VDS > ID x RDS(on)max
max.
4
20
3
typ.
15
min.
2
10
5
1
Tj = 150 C
Tj = 25 C
0
0
0
2
4
6
8
10
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
VGS, Gate-Source voltage (Volts)
Fig.7. Typical transfer characteristics.
I D = f(V GS ); parameter T j
Fig.10. Gate threshold voltage.
V GS(TO) = f(T j ); conditions: I D = 0.25 mA; V DS = V GS
10
gfs, Transconductance (S)
PHP8N50
1E-01
ID / A
SUB-THRESHOLD CONDUCTION
VDS > ID x RDS(on)max
Tj = 25 C
8
1E-02
150 C
1E-03
2 %
typ
98 %
6
4
1E-04
2
1E-05
0
1E-06
0
5
10
15
20
25
0
1
2
3
4
ID, Drain current (A)
VGS / V
Fig.8. Typical transconductance.
g fs = f(I D ); parameter T j
Fig.11. Sub-threshold drain current.
I D = f(V GS) ; conditions: T j = 25 ˚C; V DS = V GS
a
Normalised RDS(ON) = f(Tj)
10000
Junction capacitances (pF)
PHP8N50
2
1000
Ciss
1
100
Coss
Crss
0
10
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
1
10
100
1000
VDS, Drain-Source voltage (Volts)
Fig.9. Normalised drain-source on-state resistance.
a = R DS(ON) /R DS(ON)25 ˚C = f(T j ); I D = 4.25 A; V GS = 10 V
Fig.12. Typical capacitances, C iss , C oss , C rss .
C = f(V DS ); conditions: V GS = 0 V; f = 1 MHz
March 1999
4
Rev 1.000
PowerMOS transistor
22890114.001.png
Philips Semiconductors
Product specification
Avalanche energy rated
IRF840
20
IF, Source-Drain diode current (Amps)
VGS = 0 V
PHP8N50
Gate-source voltage, VGS (V)
ID = 8.5A
Tj = 25 C
PHP8N50E
15
14
1 13
200V
15
11
10
100V
8
VDD = 400 V
10
6
150 C
Tj = 25 C
5
3
5
2
0
0
20
40
60
80
0
Gate charge, QG (nC)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
VSDS, Source-Drain voltage (Volts)
Fig.13. Typical turn-on gate-charge characteristics.
V GS = f(Q G ); parameter V DS
Fig.16. Source-Drain diode characteristic.
I F = f(V SDS ); parameter T j
1000
Switching times (ns)
PHP8N50
VDD = 250 V
Non-repetitive Avalanche current, IAS (A)
VGS = 10 V
10
RD = 30 Ohms
Tj = 25 C
25 C
Tj prior to avalanche = 125 C
100
td(off)
1
VDS
tf
tp
tr
ID
PHP8N50E
td(on)
0.1
10
1E-06
1E-05
1E-04
1E-03
1E-02
0
10
20
30
40
50
60
Avalanche time, tp (s)
RG, Gate resistance (Ohms)
Fig.14. Typical switching times; t d(on) , t r , t d(off) , t f = f(R G )
Fig.17. Maximum permissible non-repetitive
avalanche current (I AS ) versus avalanche time (t p );
unclamped inductive load
1.15
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
10
Maximum Repetitive Avalanche Current, IAR (A)
1.1
Tj prior to avalanche = 25 C
1.05
1
125 C
1
0.95
0.1
0.9
PHP8N50E
0.01
0.85
1E-06
1E-05
1E-04
1E-03
1E-02
-100
-50
0
50
100
150
Avalanche time, tp (s)
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage;
V (BR)DSS /V (BR)DSS 25 ˚C = f(T j )
Fig.18. Maximum permissible repetitive avalanche
current (I AR ) versus avalanche time (t p )
March 1999
5
Rev 1.000
PowerMOS transistor
22890114.002.png 22890114.003.png

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