LA4805V.PDF

Ordering number : EN4469A

Monolithic Linear IC

LA4805V

3 V Stereo Headphone Power Amplifier

Overview

The LA4805V is a power IC developed for use in stereo

headphones. It includes low frequency enhancement, beep

function and output control circuits on-chip. Furthermore,

the LA4805V realizes a high S/N ratio, a high ripple

exclusion ratio, and low current drain.

Package Dimensions

unit: mm

3191-SSOP30

[LA4805V]

Functions

• Stereo headphone power amplifier

• Low frequency enhancement (L.BOOST)

• Beep amplifier

• Output suppression circuit (PVSS)

• Power switch

• Muting switch

Features

• Low current drain (8.3 mA typical)

• High S/N ratio (90 dB typical, 13 µV)

• High ripple exclusion ratio (75 dB typical)

• No output electrolytic capacitors required

• Ultra-miniature package (SSOP-30)

SANYO: SSOP30

Specifications

Maximum Ratings at Ta = 25°C

Parameter

Symbol

Conditions

Ratings

Unit

Maximum supply voltage

V CC max

4.5

Allowable power dissipation

Pd max

500

Operating temperature

Topr

–15 to +50

°C

Storage temperature

Tstg

–40 to +150

°C

Operating Conditions at Ta = 25°C

Parameter

Symbol

Conditions

Ratings

Unit

Recommended supply voltage

V CC

3.0

Recommended load resistance

R L

16 to 32

Operating supply voltage range

V CC op

1.8 to 3.6

Any and all SANYO products described or contained herein do not have specifications that can handle

applications that require extremely high levels of reliability, such as life-support systems, aircraft’s

control systems, or other applications whose failure can be reasonably expected to result in serious

physical and/or material damage. Consult with your SANYO representative nearest you before using

any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that

exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other

parameters) listed in products specifications of any and all SANYO products described or contained

herein.

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

O3098HA (OT)/40794TH B8-0242 No. 4469-1/17

LA4805V

Operating Characteristics

at Ta = 25°C, V CC = 3.0 V, f = 1 kHz, 0.775 V = 0 dBm, R L = 10 k

(L.B), R L = 16

(PWR)

Ratings

Parameter

Symbol

Conditions

Unit

min

typ

max

[L.BOOST +PVSS + PWR]

I CCO 1

IC off

0.05

1.0

µA

I CCO 2

Muting on

1.0

2.7

5.0

Quiescent current

I CCO 3

Rg = 0, L.BST/PVSS off

4.0

8.3

12.0

I CCO 4

Rg = 0, L.BST/PVSS on

4.5

8.6

12.5

[PWR AMP]

Output power

P O

THD = 10%

Voltage gain

VG1

V O = –10 dBm

15.7

17.7

19.7

Channel balance

V BL

V O = –10 dBm

–1

Total harmonic distortion

THD1

V O = 0.35 V

0.1

0.3

Output noise voltage

V NO 1

Rg= 0, DIN AUDIO

µV

Crosstalk

CT1

V O = –10 dBm, TUN = 1 kHz, Rg = 0

Ripple exclusion ratio

SVRR1

V CC = 1.8 V, f = 100 Hz, V R = –20 dBm,

Muting attenuation

ATT M

THD = 1%, Rg = 0 k

Beep output

V O BEEP

V IN = –16 dBm (sine wave)

1.0

3.0

Output current offset

V DC OFF

V IN = 0 V, Rg = 0

–20

Input resistance

[L.BOOST]

Voltage gain

VG2

V IN = –30 dBm, boost on/off

–3.2

–5.2

–7.2

L.BTS1

V IN = –30 dBm, f = 100 Hz, boost on

Boost *

L.BTS2

V IN = –30 dBm, f = 10 kHz, boost on

Maximum output voltage

V O max

THD = 1%, boost on

0.2

0.4

0.6

Total harmonic distortion

THD2

V O = 0.1 V, boost on

0.085

0.25

Crosstalk

CT2

V O = –20 dBm, Rg = 0, boost on

Output noise voltage

V NO 2

Rg = 0, boost off

µV

Ripple exclusion ratio

SVRR2

Rg = 0, f = 100 Hz, Vg = –20 dBm,

boost on

[L.BOOST + PWR]

Voltage gain

VG3

V IN = –30 dBm, f = 1 kHz, boost on/off

Output voltage

V O 1

V IN = –30 dBm, f = 100 Hz, boost on

0.13

0.23

0.33

Total harmonic distortion

THD3

V IN = –30 dBm, f = 100 Hz, boost on

0.14

0.5

Crosstalk

CT3

V O = –20 dBm, R V = 0

, boost on

32.5

[L.BOOST + PVSS + PWR]: When V O 1 is maximum

PVSS voltage

V O PVSS 2 V IN = –30 dBm, PVSS2

–32.5

–37.5

–42.5

dBm

PVSS width

V O PVSS W

The input amplitude when the output is

+3 dB over the starting point

PVSS distortion

THD PVSS V IN = –40 dBm, PVSS2

0.55

2.0

PVSS starting input

V IN PVSS

PVSS2

–41

–46

–51

dBm

Note: * Boost levels relative to 1 kHz

No. 4469-2/17

TUN = 100 Hz

LA4805V

Pin Assignment and Block Diagram

No. 4469-3/17

LA4805V

Test Circuit

No. 4469-4/17

LA4805V

Sample Application Circuit

No. 4469-5/17

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