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7+7W DUAL BRIDGE AMPLIFIER
TDA7266
7+7W DUAL BRIDGE AMPLIFIER
WIDE SUPPLY VOLTAGE RANGE (3-18V)
MINIMUM EXTERNAL COMPONENTS
– NO SWR CAPACITOR
– NO BOOTSTRAP
– NO BOUCHEROT CELLS
– INTERNALLY FIXED GAIN
STAND-BY & MUTE FUNCTIONS
SHORT CIRCUIT PROTECTION
THERMAL OVERLOAD PROTECTION
TECHNOLOGY BI20II
Multiwatt 15
DESCRIPTION
The TDA7266 is a dual bridge amplifier specially
designed for TV and Portable Radio applications.
ORDERING NUMBER: TDA7266
BLOCK AND APPLICATION DIAGRAM
V CC
470
m
F
100nF
3
13
0.22
m
F
4
IN1
+
-
1
OUT1+
ST-BY
7
S-GND
9
-
+
2
OUT1-
Vref
0.22
m
F
12
IN2
+
-
15
OUT2+
MUTE
6
PW-GND
-
+
14
OUT2-
8
D94AU175B
May 1997
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TDA7266
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V S
Supply Voltage
20
V
I O
Output Peak Current (internally limited)
2
A
P tot
Total Power Dissipation (T case =70
°
C)
33
W
T op
Operating Temperature
0 to 70
°
C
T stg ,T j Storage and Junction Temperature
-40 to +150
°
C
THERMAL DATA
Symbol
Description
Value
Unit
R th j-case Thermal Resistance Junction to case
Typ. 1.4
Max. 2
°
C/W
PIN CONNECTION (Top view)
15
OUT2+
OUT2-
VCC
IN2
14
13
12
11
N.C.
N.C.
S-GND
PW-GND
ST-BY
MUTE
N.C.
IN1
V CC
OUT1-
OUT1+
10
9
8
7
6
5
4
3
2
1
D95AU261
ELECTRICAL CHARACTERISTICS (V CC = 11V, R L =8 W , f = 1kHz, T amb =25 ° C unless otherwise
specified.)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
V CC
Supply Range
3
11
18
V
I q
Total Quiescent Current
50
65
mA
V OS
Output Offset Voltage
120
mV
P O
Output Power
THD = 10%
6.3
7
W
THD
Total Harmonic Distortion
P O = 1W
0.05
0.2
%
P O = 0.1W to 2W
f = 100Hz to 15kHz
1
%
SVR
Supply Voltage Rejection
f = 100Hz VR = 0.5V
40
56
dB
CT
Crosstalk
46
60
dB
A MUTE
Mute Attenuation
60
80
dB
T W
Thermal Threshold
150
°
C
G V
Closed Loop Voltage Gain
25
26
27
dB
D
Gv
Voltage Gain Matching
0.5
dB
R i
Input Resistance
25
30
K
W
VT MUTE
Mute Threshold
for V CC > 6.4V; V O = -30dB
for V CC < 6.4V; V O = -30dB
2.3
V CC /2
-1
2.9
V CC /2
-0.75
4.1
V CC /2
-0.5
V
V
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TDA7266
ELECTRICAL CHARACTERISTICS (Continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VT ST-BY
St-by Threshold
0.8
1.3
1.8
V
I ST-BY
ST-BY current V6 = GND
100
m
A
e N
Total Output Noise Voltage
A curve
f = 20Hz to 20kHz
150
m
V
APPLICATION SUGGESTION
STAND-BY AND MUTE FUNCTIONS
(A) Microprocessor Application
In order to avoid annoying ”Pop-Noise” during
Turn-On/Off transients, it is necessary to guaran-
tee the right St-by and mute signals sequence.
It is quite simple to obtain this function using a mi-
croprocessor (Fig. 1 and 2).
At first St-by signal (from mP) goes high and the
voltage across the St-by terminal (Pin 7) starts to
increase exponentially. The external RC network
is intended to turn-on slowly the biasing circuits of
the amplifier, this to avoid ”POP” and ”CLICK” on
the outputs.
When this voltage reaches the St-by threshold
level, the amplifier is switched-on and the external
capacitors in series to the input terminals (C3,
C5) start to charge.
It’s necessary to mantain the mute signal low until
the capacitors are fully charged, this to avoid that
the device goes in play mode causing a loud ”Pop
Noise” on the speakers.
A delay of 100-200ms between St-by and mute
signals is suitable for a proper operation.
Figure 1: Microprocessor Application
V CC
C1 0.22
m
F
4
3
13
C5
470
m
F
C6
100nF
IN1
+
-
1
OUT1+
ST-BY
R1 10K
7
C2
10 m F
m
P
S-GND
9
Vref
-
+
2
OUT1-
C3 0.22
m
F
12
IN2
+
-
15
OUT2+
MUTE
R2 10K
6
C4
1 m F
PW-GND
-
+
14
OUT2-
8
D95AU258A
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TDA7266
Figure 2: Microprocessor Driving Signals.
+V S (V)
+18
V IN
(mV)
V ST-BY
pin 7
1.8
1.3
0.8
V MUTE
pin 6
4.1
2.9
2.3
I q
(mA)
V OUT
(V)
OFF
PLAY
MUTE
ST-BY
OFF
ST-BY
MUTE
D96AU259
(B) Low Cost Application
In low cost applications where the mP is not pre-
sent, the suggested circuit is shown in fig.3.
The St-by and mute terminals are tied together
and they are connected to the supply line via an
external voltage divider.
The device is switched-on/off from the supply line
and the external capacitor C4 is intended to delay
the St-by and mute threshold exceeding, avoiding
”Popping” problems.
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TDA7266
Figure 3a: Stand-alone Low-cost Application.
V CC
IN1
C1
470
C2
100nF
C3 0.22
m
F
3
13
m
F
4
R1
47K
+
-
1
OUT1+
IN1
ST-BY
7
R2
47K
C4
10
F
S-GND
9
Vref
-
+
2
OUT1-
C5 0.22
m
F
12
+
-
15
OUT2+
IN2
MUTE
6
-
+
14
OUT2-
PW-GND
8
D95AU260
Figure 3b: PCB and Component Layout of the Application Circuit (Fig. 1).
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m
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