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VeriBest FPGA Synthesis VHDL Reference Manual - DLA029300
VeriBest FPGA Synthesis
VHDL Reference Manual
VB 98.0 Reprint
DLA029300
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ii • VeriBest FPGA Synthesis VHDL Reference Manual
Table of Contents
Chapter 1
Using FPGA Express with VHDL
........................................................................................... 1-1
Hardware Description Languages
......................................................................................................... 1-1
Typical Uses for HDLs...................................................................................................................... 1-1
Advantages of HDLs ........................................................................................................................ 1-2
About VHDL
.............................................................................................................................................. 1-2
FPGA Express Design Process
............................................................................................................. 1-4
Using FPGA Express to Compile a VHDL Design
.
.............................................................................. 1-4
Design Methodology
............................................................................................................................... 1-4
Chapter 2
Description Styles
............................................................................................................................ 2-1
Design Hierarchy
..................................................................................................................................... 2-1
Data Types
................................................................................................................................................ 2-2
Design Constraints
.................................................................................................................................. 2-2
Register Selection
.................................................................................................................................... 2-2
Asynchronous Designs
.......................................................................................................................... 2-2
Language Constructs
.............................................................................................................................. 2-3
Chapter 3
Describing Designs
......................................................................................................................... 3-1
VHDL Entities
........................................................................................................................................... 3-1
VHDL Constructs
..................................................................................................................................... 3-3
Entities.............................................................................................................................................. 3-3
Architectures .................................................................................................................................... 3-5
Configurations .................................................................................................................................. 3-6
Processes......................................................................................................................................... 3-6
Subprograms.................................................................................................................................... 3-7
Packages.......................................................................................................................................... 3-8
Using a Package .......................................................................................................................... 3-8
Package Structure ........................................................................................................................ 3-9
Package Declarations................................................................................................................... 3-9
Package Bodies.......................................................................................................................... 3-10
Defining Designs
.................................................................................................................................... 3-11
Entity Specifications ....................................................................................................................... 3-11
Entity Generic Specifications ...................................................................................................... 3-12
Entity Port Specifications............................................................................................................ 3-12
iii
Entity Architectures ........................................................................................................................ 3-13
Entity Configurations ...................................................................................................................... 3-16
Subprograms.................................................................................................................................. 3-17
Subprogram Declarations........................................................................................................... 3-17
Subprogram Bodies.................................................................................................................... 3-19
Subprogram Overloading ........................................................................................................... 3-20
Operator Overloading ................................................................................................................. 3-21
Type Declarations .......................................................................................................................... 3-21
Subtype Declarations ..................................................................................................................... 3-21
Constant Declarations .................................................................................................................... 3-22
Signal Declarations ........................................................................................................................ 3-22
Resolution Functions...................................................................................................................... 3-22
Variable Declarations ..................................................................................................................... 3-25
Structural Design
................................................................................................................................... 3-25
Using Hardware Components ........................................................................................................ 3-26
Component Declaration.................................................................................................................. 3-26
Sources of Components ............................................................................................................. 3-27
Consistency of Component Ports ............................................................................................... 3-27
Component Instantiation Statement ............................................................................................... 3-27
Mapping Generic Values ............................................................................................................ 3-28
Mapping Port Connections ......................................................................................................... 3-29
Technology-Independent Component Instantiation........................................................................ 3-30
Chapter 4
Data Types
............................................................................................................................................. 4-1
Enumeration Types
................................................................................................................................. 4-2
Enumeration Overloading................................................................................................................. 4-3
Enumeration Encoding ..................................................................................................................... 4-3
Enumeration Encoding Values ......................................................................................................... 4-4
Integer Types
............................................................................................................................................ 4-5
Array Types
............................................................................................................................................... 4-5
Constrained Array ............................................................................................................................ 4-6
Unconstrained Array......................................................................................................................... 4-6
Array Attributes................................................................................................................................. 4-7
Record Types
........................................................................................................................................... 4-8
Predefined VHDL Data Types
................................................................................................................. 4-9
Data Type BOOLEAN .................................................................................................................... 4-11
Data Type BIT ................................................................................................................................ 4-11
Data Type CHARACTER ............................................................................................................... 4-11
Data Type INTEGER...................................................................................................................... 4-11
Data Type NATURAL ..................................................................................................................... 4-11
Data Type POSITIVE ..................................................................................................................... 4-11
Data Type STRING ........................................................................................................................ 4-12
Data Type BIT_VECTOR ............................................................................................................... 4-12
Unsupported Data Types
...................................................................................................................... 4-12
iv • VeriBest FPGA Synthesis VHDL Reference Manual
Physical Types ............................................................................................................................... 4-12
Floating Point Types....................................................................................................................... 4-12
Access Types ................................................................................................................................. 4-12
File Types....................................................................................................................................... 4-12
SYNOPSYS Data Types
......................................................................................................................... 4-12
Subtypes
................................................................................................................................................. 4-12
Chapter 5
Expressions
.......................................................................................................................................... 5-1
Operators
.................................................................................................................................................. 5-2
Logical Operators ............................................................................................................................. 5-3
Relational Operators ........................................................................................................................ 5-4
Adding Operators ............................................................................................................................. 5-5
Unary (Sign) Operators .................................................................................................................... 5-8
Multiplying Operators ....................................................................................................................... 5-8
Miscellaneous Arithmetic Operators............................................................................................... 5-10
Operands
................................................................................................................................................. 5-11
Operand Bit Width .......................................................................................................................... 5-12
Computable Operands ................................................................................................................... 5-12
Literals............................................................................................................................................ 5-14
Numeric Literals.......................................................................................................................... 5-14
Character Literals ....................................................................................................................... 5-15
Enumeration Literals................................................................................................................... 5-15
String Literals.............................................................................................................................. 5-15
Identifiers........................................................................................................................................ 5-16
Indexed Names .............................................................................................................................. 5-17
Slice Names ................................................................................................................................... 5-18
Limitations on Null Slices............................................................................................................ 5-19
Limitations on Noncomputable Slices......................................................................................... 5-20
Records and Fields ........................................................................................................................ 5-20
Aggregates ..................................................................................................................................... 5-21
Attributes ........................................................................................................................................ 5-22
Function Calls................................................................................................................................. 5-22
Qualified Expressions..................................................................................................................... 5-23
Type Conversions .......................................................................................................................... 5-24
Chapter 6
Sequential Statements
.................................................................................................................. 6-1
Assignment Statements
.......................................................................................................................... 6-2
Assignment Targets ......................................................................................................................... 6-2
Simple Name Targets....................................................................................................................... 6-2
Indexed Name Targets..................................................................................................................... 6-3
Slice Targets .................................................................................................................................... 6-4
Field Targets .................................................................................................................................... 6-5
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