Acer Aspire One AO530_AO631_AO531h_Quanta_ZG8_DAOZG8MB6E0_Rev1A.pdf

PCB STACK UP

ZG8 Block Diagram

LAYER 1 : TOP

LAYER 2 : GND1

LAYER 3 : IN1

LAYER 4 : IN2

LAYER 5 : VCC

LAYER 6 : IN3

Intel Diamondville

LAYER 7 : GND2

LAYER 8 : BOT

FSB

P3,4

FSB(533/667MHZ)

1.8@ for 1.8HDD

FSB

INT_CRT

Channel A DDR II

CRT

533 MHZ

DDRII-SODIMM

Intel 945GMS

P14

2.5@ for 2.5HDD

P13

P5,6,7,8,9

INT_LVDS

10.1"Panel

DMI

P14

DMI(x2)

SATA 0

DMI

SATA - HDD

PCIE-1

SATA

P19

3G/WiMAX

SIM Card

USB-5

P20

CK505

PCI-Express

PCI-E

PCIE-2

10/100 LAN

POWER SYSTEM

ISL88731

Intel I/O Controller Hub 7

P24

P25

P26

Atheros 8132/8114

(ICH7M)

P18

ISL6237

ISL6261A

USB-0

USB 2.0 (Port0~7)

CCD

USB

P14

TPS51116

G9338

P27

P29

PCIE-3

P10,11,12

WLAN

RT8202

P30

USB-6

P20

4 in 1 Card Reader

USB-3

Realtek RTS5159

RTC

P21

VCC_CORE

USB-1,2,4

USB port*3

BATTERY

PCIE-4

SD Cardreader

P17

+1.5V

P24

JM385

P22

USB-7

Bluetooth module

Azalia

P15

+1.05V

IHDA

LPC

+1.8VSUS

LPC

+1.5VVSUS

Audio Codec

Winbond WPCE775L

+2.5V

Realtek ALC272

3VPCU

P16

P23

+3.3V

+3.3VSUS

LCD_3.3V

LCD_5V

+5V

+SMDDR_VTERM

+SMDDR_VREF

Touch Pad /B

Con.

K/B Con.

SPI Flash

Charger

Audio AMP

P15

P23

P24

P16

Quanta Computer Inc.

PROJECT :

Block Diagram

Quanta Computer Inc.

PROJECT :

Block Diagram

Quanta Computer Inc.

PROJECT :

Block Diagram

Int. MIC

Audio Jack

Int. SPK

ZG8

Size

Document Number

Rev

Date:

Monday, January 19, 2009

Sheet

Clock Generator(CLK)

+3V

+1.05V_VDD

PM_STPPCI#

R114

2.2K_4

PBY160808T-301Y-N/2A/300ohm_6

L13

C190

*0.1u/10V_4

L12

PBY160808T-301Y-N/2A/300ohm_6

+3V

+1.05V

L13

PM_STPCPU#

R113

2.2K_4

C199

*0.1u/10V_4

C171

*10u/10V_8

C179

10u/10V_8

C187

0.1u/10V_4

C177

0.1u/10V_4

C172

0.1u/10V_4

C173

0.1u/10V_4

C178

0.1u/10V_4

C176

*0.1u/10V_4

C168

*10u/10V_8

NEW_CLKREQ#_R

R110

10K_4

C182

0.1u/10V_4

SATA_CLKREQ#_R

R132

10K_4

0121 Add

VDD_PCI

IO_VOUT

C194

0.1u/10V_4

VDD_48

SMBCK1

SMBDT1

VDD_PLL3

SCLK

C184

0.1u/10V_4

VDD_CK_VDD_REF

PCLK_591_R

C196

*33p/50V_4

VDD_REF

SDA

CK505

C170

0.1u/10V_4

PM_STPPCI#

(12)

VDD_SRC

SRC5/PCI_STOP#

PM_STPCPU#

To SB

CLKUSB_48

C197

*15p/50V_4

PM_STPCPU#

(12)

VDD_CPU

SRC5#/CPU_STOP#

+1.05V_VDD

C208

10u/10V_8

VDD_96_IO

CPU0

CLK_CPU_BCLK

(3)

To CPU

14M_ICH

C214

*33p/50V_4

CLK_CPU_BCLK#

(3)

VDD_PLL3_IO

CPU0#

VDD_SRC_IO_1

CLK_MCH_BCLK

(5)

VDD_SRC_IO_3

CPU1

To NB

PCLK_ICH_R

C193

*33p/50V_4

VDD_SRC_IO_2

CPU1#

CLK_MCH_BCLK#

(5)

VDD_CPU_IO

0121 Add

T20

SRC8/ITP

T19

SRC8#/ITP#

R129

475/F_4

SATA_CLKREQ#_R

SATA_CLKREQ#

(20)

PCI0/CR#_A

SRC10#

CLK_PCIE_3GPLL#

(7)

To NB

CLK_PCIE_3GPLL

(7)

SRC10

R157

47_4

PCLK_DEBUG_R

(20)

PCLK_DEBUG

PCI1/CR#_B

CLK_MCH_OE#_R

R112

475/F_4

MCH_CLKREQ#

(7)

SRC11/CR#_H

PCLK_OZ129

NEW_CLKREQ#_R

R111

475/F_4

CLKREQ_WLAN#

(20)

PCI2/TME

SRC11#/CR#_G

T67

PCI_CLK_SIO

PCLK_591_R

PCI3

SRC9

PE2CLK+

(20)

To Mini Card 1 (WLAN)

SRC9#

PE2CLK-

(20)

R160

33_4

(23)

LCLK_EC

PCI4/SRC5_EN

SRC7/CR#_F

PE1CLK+

(18)

PCLK_ICH

R153

33_4

PCLK_ICH_R

To LAN

(11)

PCLK_ICH

PE1CLK-

(18)

PCIF5/ITP_EN

SRC7#/CR#_E

SEL2

SEL1

SEL0

Frequence select

CG_XIN

PE0CLK+ (20)

PE0CLK- (20)

PE3CLK+ (22)

PE3CLK- (22)

CLK_PCIE_ICH

XTAL_IN

SRC6

To Mini Card 2 (3G/WMAX)

FSC FSB FSA CPU SRC PCI

1 0 1 100 100 33

SRC6#

CG_XOUT

XTAL_OUT

R144

22_4

(21)

CLK_Card48_1

SRC4

FSA

To SDIO

R147

22_4

(12)

CLKUSB_48

USB_48/FSA

SRC4#

CLK_BSEL0

R140

2.2K_4

Default

0 0 1 133 100 33

0 1 1 166 100 33

0 1 0 200 100 33

0 0 0 266 100 33

1 0 0 333 100 33

1 1 0 400 100 33

1 1 1 Reserved

CLK_BSEL1

FSB/TEST/MODE

SRC3/CR#_C

(11)

CLK_BSEL2

R158

10K_4

To SB

CLK_PCIE_ICH#

(11)

SRC3#/CR#_D

R156

47_4

FSC

(12)

14M_ICH

REF0/FSC/TESTSEL

CLK_PCIE_SATA

(10)

VSS_BODY

SRC2/SATA

To SB

VSS_PCI

SRC2#/SATA#

CLK_PCIE_SATA#

(10)

C201

33p/50V_4

VSS_48

CG_XIN

VSS_IO

SRC1/SE1

DREFSSCLK

(7)

To NB

DREFSSCLK#

(7)

VSS_PLL3

SRC1#/SE2

14.318MHZ

VSS_CPU

CL=20p

DREFCLK

(7)

VSS_SRC1

SRC0/DOT96

To NB

VSS_SRC2

SRC0#/DOT96#

DREFCLK#

(7)

C202

33p/50V_4

VSS_SRC3

CG_XOUT

VR_PWRGD_CK410

(12)

VSS_REF

CKPWRGD/PWRDWN#

SLG8SP513

SLG8SP513VTR ,ICS9LPRS365BKLFT

12/19 modify

R167

10K_4

PCLK_OZ129

To NB

+3V

ICS9LPRS365

(ALPRS365K13)

RTM875T-606

(AL000875K06)

CLK_BSEL0

R128

1K_4

MCH_BSEL0

(7)

(3)

CPU_BSEL0

PULL HIGH

PULL DOWN

R168

*10K_4

PCI2/TME

internal PD

Pin 11

PCI2/TME

NO OVERCLOCKING

(default)

NORMAL RUN

R161

*10K_4

PCLK_591_R

+3V

PCI-3/SRC5_EN

internal PD

PCI-4/27M_SEL

internal PD

PIN37/38 IS

PCI_STOP/CPU_STOP

HIGH 27MHz

LOW SRC

Pin 12

PCI-3

PIN37/38 IS SRC5

(default)

CLK_BSEL1

R145

1K_4

MCH_BSEL1

(7)

(3)

CPU_BSEL1

R155

10K_4

PIN 17/18

IS SRC/DOT

Pin 13

PCI-4/27M_SEL

PIN 17/18 IS 27MHz

(default)

R151

*10K_4

PCLK_ICH_R

+3V

PCIF-5/ITP_EN

internal PD

Pin 14

PCIF-5/ITP_EN

PIN 46/47 IS CPUITP

PIN 46/47 IS SRC8

(default)

R152

10K_4

CLK_BSEL2

R146

1K_4

(3)

CPU_BSEL2

MCH_BSEL2

(7)

+3V

Clock Gen I2C

<MAIN>:ICS9LPRS365BGLFT QCI:ALPRS365K13

<SECOND>:SLG8SP512TTR: QCI:AL8SP512K05

R172

4.7K_4

R171

4.7K_4

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

SMBDT1

SMBCK1

(12,20)

PDAT_SMB

SMBDT1

(13)

(12,20)

PCLK_SMB

SMBCK1

(13)

ZG8

2N7002E

Size

Document Number

Rev

CLOCK GENERATOR

Date:

Tuesday, February 03, 2009

Sheet

CPU-1(CPU)

U21A

U21B

(5)

H_A#[31:3]

(5)

H_D#[63:0]

(5)

H_A#3

H_A#4

H_A#5

H_A#7

H_A#8

H_D#0

H_D#1

H_D#2

H_D#4

H_D#5

H_D#32

P21

V19

Y11

H_ADS#

(5)

A[3]#

ADS#

D[0]#

D[32]#

H_D#33

H20

Y19

W10

H_BNR#

(5)

A[4]#

BNR#

D[1]#

D[33]#

H_D#34

N20

U21

Y12

A[5]#

BPRI#

H_BPRI# (5)

H_DEFER#

D[2]#

D[34]#

H_A#6

H_D#3

H_D#35

R20

AA14

A[6]#

D[3]#

D[35]#

H_D#36

H_D#37

J19

T21

AA11

A[7]#

DEFER#

(5)

D[4]#

D[36]#

N19

T19

W12

H_DRDY#

(5)

A[8]#

DRDY#

D[5]#

D[37]#

H_A#9

H_D#6

H_D#38

G20

Y18

AA16

H_DBSY#

(5)

A[9]#

DBSY#

D[6]#

D[38]#

H_A#10

H_A#11

H_D#7

H_D#8

H_D#39

H_D#40

M19

Y10

A[10]#

D[7]#

D[39]#

H21

T20

H_BREQ#0

(5)

A[11]#

BR0#

D[8]#

D[40]#

H_A#12

H_D#9

H_D#41

L20

Y13

A[12]#

D[9]#

D[41]#

H_A#13

H_A#14

IERR#

H_INIT#R

R176

56_4

H_D#10

H_D#11

H_D#42

H_D#43

M20

F16

W15

+1.05V

A[13]#

IERR#

D[10]#

D[42]#

R116

1K/F_4

K19

V16

AA13

H_INIT#

(10)

A[14]#

INIT#

D[11]#

D[43]#

H_A#15

H_D#12

H_D#44

J20

R115

330_4

Y16

A[15]#

D[12]#

D[44]#

H_A#16

H_D#13

H_D#14

H_D#45

H_D#46

L21

W20

W13

H_LOCK#

(5)

A[16]#

LOCK#

D[13]#

D[45]#

K20

AA9

(5)

H_ADSTB#0

ADSTB[0]#

H_CPURST#

(5)

D[14]#

D[46]#

T37

H_AP0

H_D#15

H_D#47

D17

D15

(5)

H_REQ#[4:0]

H_RS#[2:0]

(5)

AP0

RESET#

D[15]#

D[47]#

H_REQ#0

H_REQ#1

H_RS#0

H_RS#1

N21

W18

Y14

(5)

H_DSTBN#0

H_DSTBN#2

(5)

REQ[0]#

RS[0]#

DSTBN[0]#

DSTBN[2]#

J21

Y17

Y15

REQ[1]#

RS[1]#

(5)

H_DSTBP#0

DSTBP[0]#

DSTBP[2]#

H_DSTBP#2

(5)

H_REQ#2

H_RS#2

G19

U20

W16

(5)

H_DINV#0

H_DINV#2

(5)

REQ[2]#

RS[2]#

DINV[0]#

DINV[2]#

H_REQ#3

H_REQ#4

H_DP#0

H_DP#2

P20

W19

T18

T30

REQ[3]#

TRDY#

H_TRDY#

(5)

DP#0

DP#2

R19

(5)

H_D#[63:0]

(5)

REQ[4]#

H_D#16

H_D#48

AA17

AA5

(5)

H_A#[31:3]

H_HIT#

(5)

HIT#

D[16]#

D[48]#

H_A#17

H_D#17

H_D#18

H_D#49

H_D#50

C19

V20

A[17]#

HITM#

H_HITM#

(5)

D[17]#

D[49]#

H_A#18

H_A#19

F19

A[18]#

D[18]#

D[50]#

XDP_BPM#0

H_D#19

H_D#51

E21

K17

T28

A[19]#

BPM[0]#

D[19]#

D[51]#

H_A#20

XDP_BPM#1

XDP_BPM#2

T31

H_D#20

H_D#21

H_D#52

H_D#53

A16

J18

A[20]#

BPM[1]#

D[20]#

D[52]#

H_A#21

H_A#22

T35

D19

H15

A[21]#

BPM[2]#

D[21]#

D[53]#

XDP_BPM#3

H_D#22

H_D#54

T34

C14

J15

A[22]#

BPM[3]#

D[22]#

D[54]#

H_A#23

XDP_BPM#4

XDP_BPM#5

T32

H_D#23

H_D#24

H_D#55

H_D#56

C18

K18

AA6

A[23]#

PRDY#

D[23]#

D[55]#

H_A#24

H_A#25

C20

J16

A[24]#

PREQ#

D[24]#

D[56]#

XDP_TCK

H_D#25

H_D#57

E20

M17

A[25]#

TCK

D[25]#

D[57]#

H_A#26

XDP_TDI

XDP_TDO

H_D#26

H_D#27

H_D#58

H_D#59

D20

N16

A[26]#

TDI

D[26]#

D[58]#

H_A#27

H_A#28

T27

B18

M16

A[27]#

TDO

D[27]#

D[59]#

XDP_TMS

H_D#28

H_D#60

C15

L17

A[28]#

TMS

D[28]#

D[60]#

H_A#29

XDP_TRST#

BR1#

H_D#29

H_D#30

H_D#61

H_D#62

B16

K16

AA8

A[29]#

TRST#

D[29]#

D[61]#

H_A#30

H_A#31

R143

*0_4

B17

V15

PM_SYSRST#

(12)

A[30]#

BR1#

D[30]#

D[62]#

R159

22_4

R162

68_4

H_D#31

H_D#63

C16

+1.05V

A[31]#

D[31]#

D[63]#

H_A#32

H_PROCHOT#_R

A17

G17

H_PROCHOT#

(26)

(5)

H_DSTBN#1

H_DSTBN#3

(5)

A[32]#

PROCHOT#

DSTBN[1]#

DSTBN[3]#

H_A#33

H_A#34

B14

H_THERMDA

(4)

(5)

H_DSTBP#1

H_DSTBP#3

(5)

A[33]#

THRMDA

DSTBP[1]#

DSTBP[3]#

B15

A[34]#

THRMDC

H_THERMDC (4)

R_PM_THRMTRIP#

(5)

H_DINV#1

DINV[1]#

DINV[3]#

H_DINV#3

(5)

H_A#35

T25

H_DP#1

H_DP#3

A14

A[35]#

DP#1

DP#3

B19

H17

T36

(5)

H_ADSTB#1

ADSTB[1]#

THERMTRIP#

(4)

H_AP1

H_GTLREF

COMP0

R339

27.4/F_4

M18

AP1

GTLREF

COMP[0]

T29

R123

*1K/F_4

ACLKPH

DCLKPH

COMP1

COMP2

R340

54.9/F_4

ACLKPH

COMP[1]

R119

*1K/F_4

R341

27.4/F_4

U18

F20

(10)

H_A20M#

A20M#

DCLKPH

COMP[2]

T21

H_BINIT#

COMP3

R169

54.9/F_4

T16

V11

T17

F21

(10)

H_FERR#

CLK_CPU_BCLK

(2)

FERR#

BCLK[0]

BINIT#

COMP[3]

H_IGNNE#

EDM

EXTGBREF

V12

T24

MISC

(10)

H_IGNNE#

IGNNE#

BCLK[1]

CLK_CPU_BCLK#

(2)

EDM

R16

R18

(10)

H_STPCLK#

H_DPRSTP#

(10,26)

STPCLK#

EXTBGREF

DPRSTP#

T26

FORCEPR#

T15

N15

R17

(10)

H_INTR

LINT0

FORCEPR#

DPSLP#

H_DPSLP#

(10)

H_HFPLL

H_MCERR

T33

R15

(10)

H_NMI

LINT1

HFPLL

DPWR#

H_DPWR#

(5)

T23

U17

P17

V17

(10)

H_SMI#

H_PWRGD

(10)

SMI#

MCERR#

PWRGOOD

H_RSP#

T22

N18

RSP#

SLP#

H_CPUSLP#

(5,10)

R121

*1K_4

CORE_DET

CPU_CMREF

C21

A13

+1.05V

(2)

CPU_BSEL0

NC1

RSVD3

BSEL[0]

CORE_DET

R154

*1K_4

T69

NC2

RSVD2

(2)

CPU_BSEL1

BSEL[1]

CMREF[1]

CAD Note: Place near CPU

(2)

CPU_BSEL2

NC3

RSVD1

BSEL[2]

Layout note:

Comp0,2 connect with Zo=27.4ohm, make

trace length shorter than 0.5"

Comp1,3 connect with Zo=55ohm, make

trace length shorter than 0.5"

NC4

Diamondville_SC_Rev1

NC5

M15

NC6

L16

NC7

Diamondville_SC_Rev1

+1.05V

H_NMI

H_SMI#

H_A#32

H_A#33

H_A#34

H_A#35

R131

*1K_4

R346

1K/F_4

R134

1K/F_4

R348

1K/F_4

R342

1K/F_4

R118

*1K_4

R122

*1K_4

R345

1K/F_4

R120

*1K_4

H_INTR

H_STPCLK#

R343

1K/F_4

R130

*1K_4

H_GTLREF

EXTGBREF

CPU_CMREF

R344

1K/F_4

R124

*1K_4

H_DPSLP#

H_DPWR#

H_DPRSTP#

R126

*1K_4

+1.05V

R117

*1K_4

H_PWRGD

R347

2K/F_4

C397

0.1u/10V_4

C397

R127

2K/F_4

C188

1u/10V_4

C188

R349

2K/F_4

C398

0.1u/10V_4

R125

*1K_4

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

For defensive design

reservation only in this

initial release

0.1u/10V_4

1u/10V_4

0.1u/10V_4

XDP_TMS

XDP_TDI

R138

56_4

R135

56_4

XDP_BPM#5

XDP_TCK

R164

56_4

ZG8

R149

56_4

Layout note:

Zo=55ohm, 0.5" max

for GTLREF

Layout note:

Zo=55ohm, 0.5"

max for EXTGBREF

Layout note:

Zo=55ohm, 0.5"

max for GTLREF

XDP_TRST#

R150

56_4

Size

Document Number

Rev

Diamondville(1/2)

Date:

Monday, January 19, 2009

Sheet

2.5A

+1.05V

CPU-2(CPU)

U21C

U21D

VTT1

C200

0.1u/10V_4

C210

0.1u/10V_4

C216

1u/10V_4

C180

1u/10V_4

C181

1u/10V_4

C205

1u/10V_4

C206

10u/6.3V_6

C195

10u/6.3V_6

+ C165

330u/2.5V_7343

VSS1

VSS162

VTT2

VSS2

VSS161

VTT3

+1.05V

0.1u/10V_4

1u/10V_4

10u/6.3V_6

VSS4

VSS160

VTT4

A15

N13

VSS5

VSS159

VTT5

A18

N17

VSS6

VSS158

VTT6

VCC_CORE

PLACE IN CAVITY

A19

V10

G14

VSS7

VSS157

VCCF

VTT7

PLACE IN CORRIDOR AND CLOSE TO CPU

A20

VSS8

VSS156

VTT8

H14

VSS9

VSS155

VCCQ1

VTT9

VSS10

VSS154

VCCQ2

VTT10

C229

10u/6.3V_6

C229

C219

10u/6.3V_6

C219

C218

C224

10u/6.3V_6

C224

C223

C226

10u/6.3V_6

C226

C227

C228

10u/6.3V_6

C228

C232

C233

10u/6.3V_6

C233

C230

C231

10u/6.3V_6

C231

J14

VSS11

VSS153

VTT11

VSS12

VSS152

VTT12

B13

P13

K14

10u/6.3V_6

VSS13

VSS151

VTT13

10u/6.3V_6

B20

P15

VSS14

VSS149

VTT14

B21

P16

L14

VSS15

VSS148

VTT15

P18

VSS16

VSS147

VTT16

C17

P19

M14

VSS17

VSS146

VTT17

C191

1u/10V_4

C191

C186

1u/10V_4

C186

C185

1u/10V_4

C185

C192

1u/10V_4

C192

C198

1u/10V_4

C198

C203

1u/10V_4

C203

C209

1u/10V_4

C209

C207

1u/10V_4

C207

C211

1u/10V_4

C211

C217

1u/10V_4

C217

C189

1u/10V_4

C189

C183

1u/10V_4

C183

C204

1u/10V_4

C204

C215

1u/10V_4

C215

C213

1u/10V_4

C213

C220

1u/10V_4

C220

VSS18

VSS145

VTT18

VCC_CORE

N14

VSS19

VSS144

VTT19

1u/10V_4

VSS20

VSS143

VTT20

D14

A10

P14

VSS21

VSS142

VCCP1

VTT21

PLACE IN CAVITY

D18

R13

A11

VSS22

VSS141

VCCP2

VTT22

D21

R21

A12

R14

VSS23

VSS140

VCCP3

VTT23

+3V

B10

VSS24

VSS139

VCCP4

VTT24

B11

T14

PWM FAN(THM)

VSS25

VSS138

VCCP5

VTT25

+5V

+3V

B12

VSS26

VSS137

VCCP6

VTT26

R181

10K_4

C10

VSS27

VSS136

VCCP7

VTT27

E15

T10

C11

U10

VSS28

VSS135

VCCP8

VTT28

R180

10K_4

R183

10K_4

R179

10K_4

E16

T11

C12

U11

(23)

FANSIG

VSS29

VSS134

VCCP9

VTT29

E19

T12

D10

U12

VSS30

VSS133

VCCP10

VTT30

T13

D11

U13

VSS31

VSS132

VCCP11

VTT31

C454

*0.01u/16V_4

T18

D12

U14

VSS32

VSS131

VCCP12

VTT32

FAN_PWM_E

CN14

E10

VSS33

VSS130

VCCP13

E11

VSS34

VSS129

VCCP14

F17

E12

VSS35

VSS128

VCCP15

F18

U15

F10

F14

VSS36

VSS127

VCCP16

VCCPC64

FAN_ON#

10K_4

10K_4 R187

R187

FAN_PWM_B

Q11

MMBT3904

FAN_PWM_CN

U16

F11

F13

VSS37

VSS126

VCCP17

VCCPC63

U19

F12

E14

VSS38

VSS125

VCCP18

VCCPC62

Q10

MMBT3904

1217 EMI add

FAN

G10

E13

VSS39

VSS124

VCCP19

VCCPC61

G11

VSS41

VSS123

VCCP20

(23)

CPUFAN#

G13

G12

VSS42

VSS122

VCCP21

G21

H10

VSS45

VSS121

VCCP22

H11

VSS46

VSS120

VCCP23

+1.5V

130mA

125 Degree Protection(CPU)

V13

H12

VSS48

VSS119

VCCP24

V14

J10

VSS49

VSS118

VCCP25

+1.05V

+V1.5S_VCCA

V18

J11

VSS51

VSS117

VCCP26

H13

V21

J12

VSS52

VSS116

VCCP27

C212

0.1u/10V_4

C225

10u/10V_8

H16

K10

VSS53

VSS115

VCCP28

H18

K11

VSS54

VSS114

VCCP29

0.1u/10V_4

10u/10V_8

H19

K12

VSS55

VSS113

VCCP30

W11

L10

(7,12,23,26)

IMVP_PWRGD

VSS56

VSS112

VCCP31

VCCA

W14

L11

TO PWR

VSS57

VSS111

VCCP32

W17

L12

VSS58

VSS110

VCCP33

2N7002E

J13

W21

M10

F15

VSS59

VSS109

VCCP34

VID[0]

VID0

(26)

J17

M11

D16

VID1

(26)

VSS60

VSS108

VCCP35

VID[1]

M12

E18

VID2

(26)

VSS61

VSS107

VCCP36

VID[2]

Y20

N10

G15

VSS62

VSS106

VCCP37

VID[3]

VID3

(26)

+1.05V

Y21

N11

G16

VID4

(26)

VSS63

VSS105

VCCP38

VID[4]

R175

1K_4

AA2

N12

E17

VSS64

VSS104

VCCP39

VID[5]

VID5

(26)

K13

AA3

P10

G18

VID6

(26)

VSS65

VSS103

VCCP40

VID[6]

R173

100/F_4

R163

56_4

K15

AA4

P11

VCC_CORE

VSS66

VSS102

VCCP41

K21

AA7

P12

VSS67

VSS101

VCCP42

AA10

R10

C13

VCC_SENSE

(26)

VSS68

VSS100

VCCP43

VCCSENSE

CPU

MMBT3904

AA12

R11

VSS69

VSS99

VCCP44

R_THERMTRIP_PWR#

AA15

R12

(3)

R_PM_THRMTRIP#

SYS_SHDN#

(25,30)

VSS70

VSS98

VCCP45

AA18

D13

VSS_SENSE

(26)

VSS71

VSS97

VSSSENSE

AA19

VSS72

VSS96

Diamondville_SC_Rev1

R170

100/F_4

AA20

VSS73

VSS95

R165

*0_4

L13

VSS74

PM_THRMTRIP#

(7,10)

L15

VSS75

+3V

945GMS & ICH7M

L18

VSS76

LM86VCC

CPU Thermal monitor(THM)

R182

1_6

L19

VSS77

0.1u/10V_4

C235

VSS78

VSS79

H_THERMDA

(3)

VSS80

(23)

2ND_MBDATA

2ND_MBCLK

VSS81

SCLK

VCC

M13

VSS82

C236

2200p/50V_4

M21

(23)

VSS83

SDA

DXP

R186

10K_4

+3V

VSS84

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

R185

*0_4

THERM_ALERT#_R

(12)

THERM_ALERT#

ALERT#

DXN

+3V

FAN_ON#

R184

10K_4

H_THERMDC

(3)

ZG8

OVERT#

GND

Layout Note:Routing 10:10 mils and away

from noise source with ground gard

Diamondville_SC_Rev1

Size

Document Number

Rev

G780P81U

<NO_STUFF>

Diamondville(2/2)

ADDRESS: 4C

Date:

Monday, February 02, 2009

Sheet

945GMS(CLG)

U19A

(3)

H_D#[63:0]

H_A#[31:3]

(3)

H_D#0

H_D#1

H_D#2

H_D#3

H_D#4

H_A#3

HD0#

HA3#

+1.05V

H_A#4

D12

HD1#

HA4#

H_A#5

H_A#6

C13

HD2#

HA5#

HD3#

HA6#

H_A#7

E13

HD4#

HA7#

H_D#5

H_D#6

H_D#7

H_D#8

H_A#8

H_A#9

H_A#10

H_A#11

R84

221/F_4

E12

HD5#

HA8#

J12

HD6#

HA9#

B13

HD7#

HA10#

H_XSWING

A13

HD8#

HA11#

H_D#9

H_A#12

G13

HD9#

HA12#

H_D#10

H_D#11

H_D#12

H_D#13

H_A#13

H_A#14

H_A#15

H_A#16

A12

HD10#

HA13#

R90

100/F_4

C118

D14

HD11#

HA14#

F14

HD12#

HA15#

J13

0.1u/10V_4

HD13#

HA16#

H_D#14

H_A#17

E17

HD14#

HA17#

H_D#15

H_D#16

H_D#17

H_D#18

H_A#18

H_A#19

H_A#20

H_A#21

H15

HD15#

HA18#

G15

HD16#

HA19#

G14

10mil wide, 20mil spacing

HD17#

HA20#

A15

HD18#

HA21#

+1.05V

H_D#19

H_A#22

B18

HD19#

HA22#

H_D#20

H_A#23

H_A#24

H_A#25

H_A#26

B15

HD20#

HA23#

H_D#21

H_D#22

H_D#23

E14

HD21#

HA24#

H13

HD22#

HA25#

R108

221/F_4

C14

HD23#

HA26#

H_D#24

H_A#27

H_A#28

H_A#29

H_A#30

H_A#31

A17

HD24#

HA27#

H_D#25

H_D#26

H_D#27

H_D#28

E15

HD25#

HA28#

H_YSWING

H17

HD26#

HA29#

D17

HD27#

HA30#

G17

HD28#

HA31#

H_D#29

R109

100/F_4

C148

0.1u/10V_4

HD29#

H_D#30

H_D#31

H_D#32

H_D#33

HD30#

0.1u/10V_4

F10

HD31#

HADS#

H_ADS# (3)

H_ADSTB#0

C12

HD32#

HADSTB0#

(3)

H16

H_ADSTB#1

(3)

HD33#

HADSTB1#

H_D#34

H_DVREF

HD34#

H_AVREF

H_D#35

H_D#36

H_D#37

H_D#38

10mil wide, 20mil spacing

HD35#

HBNR#

H_BNR# (3)

H_BREQ#0

HD36#

HBPRI#

H_BPRI# (3)

H_CPURST#

(3)

HD37#

HBREQ0#

+1.05V

B10

(3)

HD38#

HCPURST#

H_D#39

H_DVREF

H_CPURST# has T topology

HD39#

HDVREF

H_D#40

HD40#

H_D#41

H_D#42

H_D#43

AA6

CLK_MCH_BCLK#

(2)

HD41#

HCLKN

R337

100/F_4

AA5

CLK_MCH_BCLK

(2)

HD42#

HCLKP

C10

H_DBSY#

(3)

HD43#

HDBSY#

H_D#44

HD44#

HDEFER#

H_DEFER#

(3)

H_D#45

H_D#46

H_D#47

H_D#48

H_DINV#0

H_DINV#1

H_DINV#2

H_DINV#3

H_DVREF

H_DINV#0

(3)

HD45#

HDINV0#

H_DINV#1

(3)

HD46#

HDINV1#

H_DINV#2

(3)

HD47#

HDINV2#

R338

200/F_4

C389

C390

HD48#

HDINV3#

H_DINV#3

(3)

H_D#49

HD49#

HDPWR#

H_DPWR#

(3)

H_D#50

H_D#51

H_D#52

H_D#53

0.1u/10V_4

*0.1u/10V_4

H_DRDY#

(3)

HD50#

HDRDY#

H_DSTBN#0

H_DSTBN#1

H_DSTBN#2

H_DSTBN#0

(3)

HD51#

HDSTBN0#

HD52#

HDSTBN1#

H_DSTBN#1

(3)

HD53#

HDSTBN2#

H_DSTBN#2

(3)

H_D#54

H_DSTBN#3

H_DSTBP#0

H_DSTBP#1

H_DSTBP#2

H_DSTBP#3

AA3

H_DSTBN#3

(3)

HD54#

HDSTBN3#

H_D#55

H_D#56

H_D#57

H_D#58

AB4

H_DSTBP#0

(3)

HD55#

HDSTBP0#

+1.05V

AB8

HD56#

HDSTBP1#

H_DSTBP#1

(3)

HD57#

HDSTBP2#

H_DSTBP#2

(3)

H_XSCOMP

H_YSCOMP

H_YRCOMP

R107

54.9/F_4

AA9

AB3

H_DSTBP#3

(3)

HD58#

HDSTBP3#

H_D#59

R335

54.9/F_4

AA8

HD59#

H_D#60

H_D#61

H_D#62

AB1

H_XRCOMP

R99

24.9/F_4

10mil wide, 20mil spacing

HD60#

H_HIT#

(3)

R334

24.9/F_4

10mil wide, 20mil spacing

AB7

HD61#

H_HITM#

(3)

AA2

HD62#

HHIT#

H_LOCK# (3)

H_REQ#[4:0]

H_D#63

AB5

HD63#

HHITM#

(3)

HLOCK#

H_REQ#0

HREQ0#

H_REQ#1

H_REQ#2

H_REQ#3

H_REQ#4

HREQ1#

H_XRCOMP

H_XSCOMP

H_XSWING

A10

G12

HXRCOMP

HREQ2#

HXSCOMP

HREQ3#

C15

F12

HXSWING

HREQ4#

H_RS#[2:0]

(3)

H_YRCOMP

H_RS#0

HYRCOMP

HRS0#

H_YSCOMP

H_RS#1

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

Quanta Computer Inc.

PROJECT :

HYSCOMP

HRS1#

H_YSWING

H_RS#2

G10

HYSWING

HRS2#

H_CPUSLP#

(3,10)

HCPUSLP#

E10

ZG8

HTRDY#

H_TRDY#

(3)

Size

Document Number

Rev

945GMS HOST

945GMS

Date:

Monday, January 19, 2009

Sheet

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