l4_seql_blocks(1).pdf

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L4: Sequential Building Blocks
(Flip- flops, Latches and Registers)
(Flip
flops, Latches and Registers)
Acknowledgements:
Materials in this lecture are courtesy of the following sources and are used with permission.
Prof. Randy Katz (Unified Microelectronics Corporation Distinguished Professor in
Electrical Engineering and Computer Science at the University of California, Berkeley)
and Prof. Gaetano Borriello (University of Washington Department of Computer
Science & Engineering) from Chapter 2 of R. Katz, G. Borriello. Contemporary Logic Design .
2nd ed. Prentice-Hall/Pearson Education, 2005.
J. Rabaey, A. Chandrakasan, B. Nikolic. Digital Integrated Circuits: A Design Perspective .
Prentice Hall/Pearson, 2003.
L4: 6.111 Spring 2006
Introductory Digital Systems Laboratory
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Combinational Logic Review
in 0
in 1
Combinational
Circuit
in 0
in 1
in N-1
in M-1
Combinational logic circuits are memoryless
No feedback in combinational logic circuits
Output assumes the function implemented by the
logic network, assuming that the switching
transients have settled
Outputs can have multiple logical transitions
before settling to the correct value
L4: 6.111 Spring 2006
Introductory Digital Systems Laboratory
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A Sequential System
Inputs
Outputs
COMBINATIONAL
LOGIC
Current State
Next state
Registers
QD
Memory element
CLK
Sequential circuits have memory (i.e., remember the past)
The current state is “held” in memory and the next state is
computed based the current state and the current inputs
In a synchronous systems, the clock signal orchestrates the
sequence of events
L4: 6.111 Spring 2006
Introductory Digital Systems Laboratory
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A Simple Example
Adding N inputs (N-1 Adders)
in 0
in 1
in 2
in N-1
Using a sequential (serial) approach
reset
in
D Q
Current_Sum
clk
L4: 6.111 Spring 2006
Introductory Digital Systems Laboratory
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Implementing State: Bi- stability
stability
V o1 =V i2
V o2 =V i1
Point C is
Metastable
C
V o1
V i2
δ
V i1 = V o2
A
V i1
V o2
Points A and
B are stable
(represent 0 & 1)
A
V i2 =V o1
C
B
B
V i1 =V o2
δ
V i1
= V o2
L4: 6.111 Spring 2006
Introductory Digital Systems Laboratory
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Implementing State: Bi
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