Wistron Yukon rev.SA Acer eMachines D620.pdf
(
1189 KB
)
Pobierz
5
4
3
2
1
Yukon Block Diagram
PCB Layer Stackup
L1: Signal 1
L2: VCC
L3: Inner Signal 2
L4: Inner Signal 3
L5: GND
L6: Signal 4
Project code: 91.4BC01.001
PCB P/N : 48.4BC01.0SA
REVISION : 08226-SA
DDR2 SODIMM
DIMM1
AMD
DDR II 533/667/800
G792
D
D
8,9
32
K8 Rev.G
AM2 Socket
DDR2 SODIMM
4,5,
6,7
DDR II 533/667/800
DIMM2
8,9
CLK GEN.
ICS 9LPRS502
(RTM875T-605)
14.318MHz
CPU V_CORE
HyperTransport
16x16
3
INPUT
OUTPUT
S-Vedio
13
DCBATOUT
ATI
VCC_CORE_S0
Mini Card
CRT
15
SYSTEM DC/DC
PCI-E x 1
802.11a/b/g/n
25
RS690MC
LCD
INPUT
DCBATOUT
OUTPUT
1D2V_S0
1D8V_S3
14
LAN
10/100
RJ45
TXFM
PCI-E x 1
C
24
24
C
Marvell8040
23
10,11,12,13
SYSTEM DC/DC
25MHz
INT. MIC Array
PCI-E x 4
INPUT
OUTPUT
DCBATOUT
5V_S5
3D3V_S5
Line In
27
Codec
ALC268
SYSTEM LDO
AZALIA
27
ATI
INPUT
OUTPUT
26
1D8V_S3
0D9V_S3
MIC In
SYSTEM LDO
AMP
SB600
G1432Q
25MHz
INPUT
OUTPUT
27
27
B
B
3D3V_S5
3D3V_S0
3D3V_S0
1D2V_S5
2D5V_S0
1D5V_S0
32.768KHz
INT.SPKR
AMP
SYSTEM LDO
27
G1412Q
LPC BUS
27
INPUT
OUTPUT
Line Out
(No-SPDIF)
5V_AUX_S5
DCBATOUT
BIOS
LPC
MODEM
SPI I/F
3D3V_AUX_S5
USB
KBC
WPC8773L
16,17,18,19,20
RJ11
MDC Card
DEBUG
CONN.
Winbond
W25X80-VSS
32.768KHz
30
22
22
Battery Charger
28
30
SATA
CCD .3M/1.3M
INPUTS
AD+
BAT+
OUTPUTS
DCBATOUT
HDD
14
Touch
Pad
INT.
KB
21
29
29
A
A
USB
2 Port
MINI USB
BlueTooth
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
22
22
Title
Title
Title
CDROM
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
SATA
21
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
A3
A3
A3
Yukon
Yukon
Yukon
SA
SA
SA
Date:
Date:
Date:
Thursday, July 03, 2008
Thursday, July 03, 2008
Thursday, July 03, 2008
Sheet
Sheet
Sheet
1
1
1
of
of
of
43
43
43
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
<Core Design>
<Core Design>
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CHANGE HISTORY
CHANGE HISTORY
CHANGE HISTORY
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
A3
A3
A3
SA
SA
SA
Yukon
Yukon
Yukon
Date:
Date:
Date:
Thursday, July 03, 2008
Thursday, July 03, 2008
Thursday, July 03, 2008
Sheet
Sheet
Sheet
2
2
2
of
of
of
43
43
43
5
4
3
2
1
5
4
3
2
1
3D3V_S0
3D3V_CLK_VDD
R162
0R0603-PAD
1
2
C279
C279
3D3V_CLK_VDDA
3D3V_S0
C301
C301
C302
C302
C280
C280
C282
C282
C273
C273
C306
C306
2
R159
0R0603-PAD
1
D
D
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
C274
C274
C281
C281
3D3V_S0
R181
R181
3D3V_48MPWR_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C304
C304
C305
C305
2D2R3J-2-GP
2D2R3J-2-GP
1- PLACE ALL SERIAL TERMINATION
RESISTORS CLOSE TO U800
DY
DY
3D3V_CLK_VDD
AMD-TL58 S3 issue change R169.R170 to 0R
SC1U16V3ZY-GP
SC1U16V3ZY-GP
U32
U32
54
50
VDDCPU
VDDA
2- PUT DECOUPLING CAPS CLOSE TO U800
POWER PIN
3000mA.80ohm
R163
R163
261R2F-GP
261R2F-GP
14
49
VDDSRC
GNDA
23
VDDSRC
CPUCLK_R
CPUCLK#_R
R169
R169
47D5R2F-1-GP
47D5R2F-1-GP
28
56
1
2
VDDSRC
CPUCLK8T0
CPUCLK
6
R170
R170
47D5R2F-1-GP
47D5R2F-1-GP
44
55
1
2
VDDSRC
CPUCLK8C0
CPUCLK#
6
5
52
VDD48
CPUCLK8T1
3D3V_S0
39
51
VDDATIG
CPUCLK8C1
R182
R182
0R0603-PAD
0R0603-PAD
1
2
2
VDDREF
SRN33J-5-GP-U
SRN33J-5-GP-U
60
16
1
2
4
NBSRC_CLK
12
VDDHTT
SRCCLKT6
RN38
RN38
17
3
NBSRC_CLK#
12
SRCCLKC6
NBSRC_CLK_R
NBSRC_CLK#_R
53
41
GNDCPU
ATIGCLKT0
C303
SC2D2U10V3ZY-1GP
15
40
GNDSRC
ATIGCLKC0
22
37
GNDSRC
ATIGCLKT1
29
36
GNDSRC
ATIGCLKC1
Parallel Resonance Crystal
45
35
GNDSRC
ATIGCLKT2
C
C
8
34
GND48
ATIGCLKC2
C294
C294
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
2
38
30
GNDATIG
ATIGCLKT3
SRN33J-5-GP-U
SRN33J-5-GP-U
1
31
2
3
4
CLK_PCIE_MINI1
25
GNDREF
ATIGCLKC3
RN41
RN41
X3
X3
58
18
1
CLK_PCIE_MINI1#
25
GNDHTT
SRCCLKT5
DY
DY
R172
1MR2J-L2-GP
R172
1MR2J-L2-GP
19
SRCCLKC5
X-14D31818M-44GP
X-14D31818M-44GP
CLK_PCIE_MINI_R
CLK_PCIE_MINI#_R
SRN33J-5-GP-U
SRN33J-5-GP-U
3
20
2
3
4
SBSRC_CLK
16
X1
SRCCLKT4
C283
C283
RN43
RN43
21
1
SBSRC_CLK#
16
SRCCLKC4
SBSRC_CLK_R
1
2
4
24
X2
SRCCLKT3
SBSRC_CLK#_R
25
SRCCLKC3
26
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
R180
R180
SRCCLKT2
3D3V_S0
27
SRCCLKC2
3D3V_S0
CLK_PCIE_LAN_R
SRN33J-5-GP-U
SRN33J-5-GP-U
1
2
11
47
1
2
4
CLK_PCIE_LAN
23
RESET_IN#
SRCCLKT0
CLK_PCIE_LAN#_R
RN37
RN37
61
46
3
CLK_PCIE_LAN#
23
NC#61
SRCCLKC0
SBLINK_CLK_R
43
10KR2J-3-GP
10KR2J-3-GP
SRCCLKT1
SRN33J-5-GP-U
SRN33J-5-GP-U
SBLINK_CLK#_R
42
1
2
4
SBLINK_CLK
12
SRCCLKC1
RN39
RN39
10KR2J-3-GP
DY
10KR2J-3-GP
DY
R184
12
3
SBLINK_CLK#
12
SRCCLKT7
DY
DY
R168
R168
13
1
2
SRCCLKC7
R184
10KR2J-3-GP
10KR2J-3-GP
CLK_REQA#
TP33
TP33
3D3V_CLK_VDD
9
57
1
9,19
SMBC0_SB
SMBCLK
CLKREQA#
CLK_REQB#
R178
R178
CLK_REQB#
TPAD28
TPAD28
10
32
1
DY
DY
2
9,19
SMBD0_SB
SMBDAT
CLKREQB#
0R2J-2-GP
0R2J-2-GP
33
CLKREQC#
DY
DY
1
R183
R183
2
48
7
10KR2J-3-GP
10KR2J-3-GP
TP40
TP40
TPAD30
TPAD30
IREF
48MHZ_1
Ioh = 5 * Iref
(2.32mA)
Voh = 0.71V @ 60 ohm
DY
DY
6
CLK48_USB_R
1
2
CLK48_USB
19
48MHZ_0
R171
475R2F-L1-GP
R171
475R2F-L1-GP
R179
R179
33R2F-3-GP
33R2F-3-GP
RN33
SRN10KJ-6-GP
63
FS1/REF1
1%
64
FS0/REF0
62
FS2/REF2
59
HTTCLK0
B
B
06/09/2006
Check SLGO EXT CLK XSL84606 (56 Pin) or XSL84605 (64 Pin) pin to pin compatable with ICS951464
ICS951462YGLFT-GP
ICS951462YGLFT-GP
FS1
R165
R165
33R2F-3-GP
33R2F-3-GP
2
1
SB_OSC_CLK
19
FS0
FS2
R551
R551
D
Y
DY
33R2F-3-GP
33R2F-3-GP
2
1
CLK14_SIO
28
R
166
R166
33R2F-3-GP
33R2F-3-GP
EXT CLK FREQUENCY SELECT TABLE(MHZ)
1
2
NB_OSC
12
SBLINK_CLK#
SBLINK_CLK
2
3
4
R
N36
RN36
SRN49D9F-GP
SRN49D9F-GP
HTREF_CLK_R
R167
33R2F-3-GP
1
2
1
HTREF_CLK
12
FS2
FS1
FS0
CPU
SRCCLK
HTT
PCI
USB
COMMENT
[2:1]
D
Y
DY
SBSRC_CLK#
SBSRC_CLK
CLK48_USB
1
2
4
R
N46
RN46
SRN49D9F-GP
SRN49D9F-GP
3
Hi-Z
100.00
Hi-Z
Hi-Z
48.00
48.00
Reserved
0 0 0
R161
49D9R2F-GP
D
Y
DY
X
100.00
X/3
X/6
Reserved
0 0 1
NBSRC_CLK#
NBSRC_CLK
2
3
4
EC61
EC61
R
N35
RN35
SRN49D9F-GP
SRN49D9F-GP
1
DY
DY
180.00
220.00
100.00
133.33
200.00
100.00
60.00
36.56
30.00
48.00
48.00
48.00
48.00
48.00
Reserved
0 1 0
D
Y
DY
0 1 1
1 0 0
1 0 1
1 1 1
100.00
73.12
Reserved
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
1
2
4
RN44
RN44
SRN49D9F-GP
SRN49D9F-GP
EMI REQUEST
3
100.00
66.66
33.33
Reserved
D
Y
DY
100.00
66.66
33.33
Reserved
CLK_PCIE_LAN
CLK_PCIE_LAN#
1
2
4
R
N34
RN34
SRN49D9F-GP
SRN49D9F-GP
3
100.00
66.66
33.33
Normal ATHLON64 operation
<Core Design>
<Core Design>
<Core Design>
DY
DY
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CLKGEN_ICS951412
CLKGEN_ICS951412
CLKGEN_ICS951412
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
A3
A3
A3
Yukon
Yukon
Yukon
SA
SA
SA
Date:
Date:
Date:
Thursday, July 03, 2008
Thursday, July 03, 2008
Thursday, July 03, 2008
Sheet
Sheet
Sheet
3
3
3
of
of
of
43
43
43
5
4
3
2
1
5
4
3
2
1
D
D
U52A
U52A
1 OF 9
1 OF 9
NB0HTTCLKOUT1
NB0HTTCLKOUT0
NB0HTTCLKOUTJ0
CPUHTTCLKOUT1
CPUHTTCLKOUTJ1
N6
AD5
CPUHTTCLKOUT1
10
10
NB0HTTCLKOUT1
L0_CLKIN_H1
L0_CLKOUT_H1
NB0HTTCLKOUTJ1
P6
AD4
CPUHTTCLKOUTJ1
10
10
NB0HTTCLKOUTJ1
L0_CLKIN_L1
L0_CLKOUT_L1
CPUHTTCLKOUT0
N3
AD1
CPUHTTCLKOUT0
10
10
NB0HTTCLKOUT0
L0_CLKIN_H0
L0_CLKOUT_H0
CPUHTTCLKOUTJ0
N2
AC1
CPUHTTCLKOUTJ0
10
1D2V_LDO_S0
10
NB0HTTCLKOUTJ0
L0_CLKIN_L0
L0_CLKOUT_L0
RN64
RN64
1
2
4
CPUHTTCTLIN1
CPUHTTCTLINJ1
NB0HTTCTLOUT
V4
Y6
TP123 TPAD28
TP123 TPAD28
TP124 TPAD28
TP124 TPAD28
?
L0_CTLIN_H1
L0_CTLOUT_H1
3
V5
W6
L0_CTLIN_L1
L0_CTLOUT_L1
U1
W2
CPUHTTCTLOUT0
CPUHTTCTLOUTJ0
CPUHTTCTLOUT0
10
10
NB0HTTCTLOUT
L0_CTLIN_H0
L0_CTLOUT_H0
SRN51J-GP
SRN51J-GP
NB0HTTCTLOUTJ
V1
W3
CPUHTTCTLOUTJ0
10
10
NB0HTTCTLOUTJ
L0_CTLIN_L0
L0_CTLOUT_L0
C
C
NB0CADOUT15
CPUCADOUT15
U6
Y5
L0_CADIN_H15
L0_CADOUT_H15
NB0CADOUTJ15
CPUCADOUTJ15
V6
Y4
CPUCADOUT[15..0]
10
L0_CADIN_L15
L0_CADOUT_L15
NB0CADOUT14
NB0CADOUT13
NB0CADOUT12
NB0CADOUT11
CPUCADOUT14
T4
AB6
CPUCADOUTJ[15..0]
10
L0_CADIN_H14
L0_CADOUT_H14
NB0CADOUTJ14
CPUCADOUTJ14
T5
AA6
10
NB0CADOUT[15..0]
L0_CADIN_L14
L0_CADOUT_L14
CPUCADOUT13
R6
AB5
10
NB0CADOUTJ[15..0]
L0_CADIN_H13
L0_CADOUT_H13
NB0CADOUTJ13
CPUCADOUTJ13
T6
AB4
L0_CADIN_L13
L0_CADOUT_L13
CPUCADOUT12
P4
AD6
L0_CADIN_H12
L0_CADOUT_H12
NB0CADOUTJ12
CPUCADOUTJ12
P5
AC6
L0_CADIN_L12
L0_CADOUT_L12
CPUCADOUT11
CPUCADOUT10
M4
AF6
L0_CADIN_H11
L0_CADOUT_H11
NB0CADOUTJ11
CPUCADOUTJ11
CPUCADOUTJ10
M5
AE6
L0_CADIN_L11
L0_CADOUT_L11
NB0CADOUT10
L6
AF5
L0_CADIN_H10
L0_CADOUT_H10
NB0CADOUTJ10
M6
AF4
L0_CADIN_L10
L0_CADOUT_L10
NB0CADOUT9
NB0CADOUT8
CPUCADOUT9
K4
AH6
L0_CADIN_H9
L0_CADOUT_H9
NB0CADOUTJ9
NB0CADOUTJ8
CPUCADOUTJ9
K5
AG6
L0_CADIN_L9
L0_CADOUT_L9
CPUCADOUT8
J6
AH5
L0_CADIN_H8
L0_CADOUT_H8
CPUCADOUTJ8
K6
AH4
L0_CADIN_L8
L0_CADOUT_L8
NB0CADOUT7
CPUCADOUT7
U3
Y1
L0_CADIN_H7
L0_CADOUT_H7
NB0CADOUTJ7
U2
W1
CPUCADOUTJ7
L0_CADIN_L7
L0_CADOUT_L7
NB0CADOUT6
R1
AA2
CPUCADOUT6
CPUCADOUT5
L0_CADIN_H6
L0_CADOUT_H6
NB0CADOUTJ6
T1
AA3
CPUCADOUTJ6
CPUCADOUTJ5
L0_CADIN_L6
L0_CADOUT_L6
NB0CADOUT5
R3
AB1
L0_CADIN_H5
L0_CADOUT_H5
NB0CADOUTJ5
NB0CADOUT4
R2
AA1
L0_CADIN_L5
L0_CADOUT_L5
CPUCADOUT4
N1
AC2
L0_CADIN_H4
L0_CADOUT_H4
NB0CADOUTJ4
CPUCADOUTJ4
P1
AC3
L0_CADIN_L4
L0_CADOUT_L4
NB0CADOUT3
CPUCADOUT3
L1
AE2
L0_CADIN_H3
L0_CADOUT_H3
B
B
NB0CADOUTJ3
CPUCADOUTJ3
M1
AE3
L0_CADIN_L3
L0_CADOUT_L3
NB0CADOUT2
CPUCADOUT2
L3
AF1
L0_CADIN_H2
L0_CADOUT_H2
NB0CADOUTJ2
CPUCADOUTJ2
L2
AE1
L0_CADIN_L2
L0_CADOUT_L2
NB0CADOUT1
NB0CADOUTJ1
CPUCADOUT1
J1
AG2
L0_CADIN_H1
L0_CADOUT_H1
CPUCADOUTJ1
K1
AG3
L0_CADIN_L1
L0_CADOUT_L1
NB0CADOUT0
CPUCADOUT0
J3
AH1
L0_CADIN_H0
L0_CADOUT_H0
NB0CADOUTJ0
CPUCADOUTJ0
J2
AG1
L0_CADIN_L0
L0_CADOUT_L0
SKT-CPU940P-1-GP
62.10040.151
SKT-CPU940P-1-GP
62.10040.151
<Core Design>
<Core Design>
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU(1/4)_HyperTransport I/F
CPU(1/4)_HyperTransport I/F
CPU(1/4)_HyperTransport I/F
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
A3
A3
A3
SA
SA
SA
Yukon
Yukon
Yukon
Date:
Date:
Date:
Thursday, July 03, 2008
Thursday, July 03, 2008
Thursday, July 03, 2008
Sheet
Sheet
Sheet
4
4
4
of
of
of
43
43
43
5
4
3
2
1
5
4
3
2
1
U52C
U52C
U52B
U52B
9
M_B_DQ[63..0]
3 OF 9
3 OF 9
M_B_DQ63
AH13
AJ19
M_B_CLK_DDR2
9
9
M_A_DQ[63..0]
2 OF 9
2 OF 9
MB_DATA63
MB0_CLK_H2
M_A_DQ63
M_B_DQ62
M_B_DQ60
AE14
AG21
AL13
AK19
M_A_CLK_DDR2
9
M_B_CLK_DDR2#
9
MA_DATA63
MA0_CLK_H2
MB_DATA62
MB0_CLK_L2
M_A_DQ62
M_B_DQ61
M_B_DQ59
M_B_DQ57
M_B_DQ56
AG14
AG20
AL15
A18
MA_DATA62
MA0_CLK_L2
M_A_CLK_DDR2#
9
MB_DATA61
MB0_CLK_H1
M_B_CLK_DDR1
9
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ57
M_A_DQ56
AG16
G19
AJ15
A19
D
D
MA_DATA61
MA0_CLK_H1
M_A_CLK_DDR1
9
MB_DATA60
MB0_CLK_L1
M_B_CLK_DDR1#
9
AD17
H19
AF13
U31
TP128 TPAD28
TP128 TPAD28
MA_DATA60
MA0_CLK_L1
M_A_CLK_DDR1#
9
MB_DATA59
MB0_CLK_H0
AD13
U27
TP125 TPAD28
TP125 TPAD28
M_B_DQ58
AG13
U30
TP127 TPAD28
TP127 TPAD28
MA_DATA59
MA0_CLK_H0
MB_DATA58
MB0_CLK_L0
M_A_DQ58
AE13
U26
TP126 TPAD28
TP126 TPAD28
AL14
MA_DATA58
MA0_CLK_L0
MB_DATA57
AG15
AK15
AE30
M_B_CS1#
8,9
MA_DATA57
MB_DATA56
MB0_CS_L1
M_B_DQ55
AE16
AC25
AL16
AC31
M_A_CS1#
8,9
M_B_CS0#
8,9
MA_DATA56
MA0_CS_L1
MB_DATA55
MB0_CS_L0
M_A_DQ55
M_A_DQ54
M_B_DQ54
AG17
AA24
AL17
M_A_CS0#
8,9
MA_DATA55
MA0_CS_L0
MB_DATA54
M_B_DQ53
AE18
AK21
AD29
M_B_ODT0
8,9
MA_DATA54
MB_DATA53
MB0_ODT0
M_A_DQ53
M_A_DQ52
M_B_DQ52
AD21
AC28
AL21
M_A_ODT0
8,9
MA_DATA53
MA0_ODT0
MB_DATA52
M_B_DQ51
M_B_DQ49
M_B_DQ48
AG22
AH15
AL19
MA_DATA52
MB_DATA51
MB1_CLK_H2
M_A_DQ51
M_B_DQ50
AE17
AE20
AJ16
AL18
MA_DATA51
MA1_CLK_H2
MB_DATA50
MB1_CLK_L2
M_A_DQ50
AF17
AE19
AH19
C19
MA_DATA50
MA1_CLK_L2
MB_DATA49
MB1_CLK_H1
M_A_DQ49
M_A_DQ48
AF21
G20
AL20
D19
MA_DATA49
MA1_CLK_H1
MB_DATA48
MB1_CLK_L1
M_B_DQ47
AE21
G21
AJ22
W29
MA_DATA48
MA1_CLK_L1
MB_DATA47
MB1_CLK_H0
M_A_DQ47
M_B_DQ46
AF23
V27
AL22
W28
MA_DATA47
MA1_CLK_H0
MB_DATA46
MB1_CLK_L0
M_A_DQ46
M_B_DQ45
M_B_DQ44
AE23
W27
AL24
MA_DATA46
MA1_CLK_L0
MB_DATA45
M_A_DQ45
M_A_DQ44
M_B_CS3#_1
M_B_CS2#_1
AJ26
AK25
AE29
1
2
M_B_CS3#
8,9
MA_DATA45
MB_DATA44
MB1_CS_L1
M_A_CS3#_1
M_A_CS2#_1
M_B_DQ43
M_B_DQ41
R579
R579
0R2J-2-GP
0R2J-2-GP
AG26
AD27
1
2
AJ21
AB31
1
2
M_A_CS3#
8,9
M_B_CS2#
8,9
MA_DATA44
MA1_CS_L1
MB_DATA43
MB1_CS_L0
M_A_DQ43
M_A_DQ41
M_A_DQ40
R581
R581
0R2J-2-GP
0R2J-2-GP
M_B_DQ42
R582
R582
0R2J-2-GP
0R2J-2-GP
AE22
AA25
1
2
AH21
M_A_CS2#
8,9
MA_DATA43
MA1_CS_L0
MB_DATA42
M_A_DQ42
R580
R580
0R2J-2-GP
0R2J-2-GP
AG23
AH23
AD31
M_B_ODT1
8,9
MA_DATA42
MB_DATA41
MB1_ODT0
M_B_DQ40
AH25
AC27
AJ24
M_A_ODT1
8,9
MA_DATA41
MA1_ODT0
MB_DATA40
M_B_DQ39
AF25
AL27
MA_DATA40
MB_DATA39
M_A_DQ39
M_A_DQ38
M_B_DQ38
AJ28
AK27
MA_DATA39
MB_DATA38
M_B_DQ37
M_B_DQ36
AJ29
AB25
AH31
AC29
M_A_CAS#
8,9
M_B_CAS#
8,9
MA_DATA38
MA_CAS_L
MB_DATA37
MB_CAS_L
M_A_DQ37
M_A_DQ36
AF29
AB27
AG30
AC30
MA_DATA37
MA_WE_L
M_A_WE#
8,9
MB_DATA36
MB_WE_L
M_B_WE#
8,9
AE26
AA26
M_B_DQ35
M_B_DQ33
M_B_DQ32
AL25
AB29
MA_DATA36
MA_RAS_L
M_A_RAS#
8,9
MB_DATA35
MB_RAS_L
M_B_RAS#
8,9
M_A_DQ35
M_A_DQ33
M_A_DQ32
AJ27
M_B_DQ34
AL26
MA_DATA35
MB_DATA34
M_A_DQ34
AH27
N25
AJ30
N31
M_A_BS#2 8,9
M_B_BS#2 8,9
M_B_BS#0 8,9
MA_DATA34
MA_BANK2
MB_DATA33
MB_BANK2
AG29
Y27
AJ31
AA31
M_A_BS#1 8,9
M_B_BS#1 8,9
MA_DATA33
MA_BANK1
MB_DATA32
MB_BANK1
C
M_B_DQ31
C
AF27
AA27
E31
AA28
M_A_BS#0 8,9
MA_DATA32
MA_BANK0
MB_DATA31
MB_BANK0
M_A_DQ31
M_B_DQ30
E29
E30
MA_DATA31
MB_DATA30
M_A_DQ30
M_B_DQ29
M_B_DQ28
E28
L27
B27
M31
M_A_CKE1
8,9
M_B_CKE1
8,9
MA_DATA30
MA_CKE1
MB_DATA29
MB_CKE1
M_A_DQ29
D27
M25
A27
M29
M_A_CKE0
8,9
M_B_CKE0
8,9
MA_DATA29
MA_CKE0
MB_DATA28
MB_CKE2
M_A_DQ28
M_B_DQ27
M_B_DQ25
M_B_DQ24
M_B_DQ23
C27
F29
MA_DATA28
MB_DATA27
M_A_DQ27
M_A_DQ25
M_A_DQ24
M_A_A15
M_B_DQ26
M_B_A15
G26
M27
F31
N28
MA_DATA27
MA_ADD15
MB_DATA26
MB_ADD15
M_A_DQ26
M_A_A14
M_B_A14
F27
N24
A29
N29
M_B_A[15..0]
8,9
MA_DATA26
MA_ADD14
MB_DATA25
MB_ADD14
M_A_A13
M_A_A12
M_B_A13
C28
AC26
A28
AE31
MA_DATA25
MA_ADD13
MB_DATA24
MB_ADD13
M_B_A12
E27
N26
A25
N30
MA_DATA24
MA_ADD12
MB_DATA23
MB_ADD12
M_A_DQ23
M_A_DQ22
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_B_DQ22
M_B_A11
F25
P25
A24
P29
M_A_A[15..0]
8,9
MA_DATA23
MA_ADD11
MB_DATA22
MB_ADD11
M_B_DQ21
M_B_DQ20
M_B_A10
E25
Y25
C22
AA29
MA_DATA22
MA_ADD10
MB_DATA21
MB_ADD10
M_A_DQ21
M_A_DQ20
M_B_A9
E23
N27
D21
P31
MA_DATA21
MA_ADD9
MB_DATA20
MB_ADD9
M_B_DQ19
M_B_DQ17
M_B_DQ16
M_B_A8
D23
R24
A26
R29
MA_DATA20
MA_ADD8
MB_DATA19
MB_ADD8
M_A_DQ19
M_A_DQ17
M_B_DQ18
M_B_A7
E26
P27
B25
R28
MA_DATA19
MA_ADD7
MB_DATA18
MB_ADD7
M_A_DQ18
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_B_A6
C26
R25
B23
R31
MA_DATA18
MA_ADD6
MB_DATA17
MB_ADD6
M_B_A5
G23
R26
A22
R30
MA_DATA17
MA_ADD5
MB_DATA16
MB_ADD5
M_A_DQ16
M_B_DQ15
M_B_A4
F23
R27
B21
T31
MA_DATA16
MA_ADD4
MB_DATA15
MB_ADD4
M_A_DQ15
M_B_DQ14
M_B_A3
E22
T25
A20
T29
MA_DATA15
MA_ADD3
MB_DATA14
MB_ADD3
M_A_DQ14
M_B_DQ13
M_B_DQ12
M_B_A2
E21
U25
C16
U29
MA_DATA14
MA_ADD2
MB_DATA13
MB_ADD2
M_A_DQ13
M_A_DQ12
M_A_A1
M_A_A0
M_B_A1
F17
T27
D15
U28
MA_DATA13
MA_ADD1
MB_DATA12
MB_ADD1
M_B_DQ11
M_B_DQ9
M_B_A0
G17
W24
C21
AA30
MA_DATA12
MA_ADD0
MB_DATA11
MB_ADD0
M_A_DQ11
M_A_DQ9
M_A_DQ8
G22
M_B_DQ10
A21
MA_DATA11
MB_DATA10
M_A_DQ10
F21
AD15
M_A_DQS7
A17
AK13
M_B_DQS7
MA_DATA10
MA_DQS_H7
MB_DATA9
MB_DQS_H7
G18
AE15
M_A_DQS#7
M_B_DQ8
A16
AJ13
M_B_DQS#7
M_B_DQS[7..0]
9
MA_DATA9
MA_DQS_L7
MB_DATA8
MB_DQS_L7
E17
AG18
M_A_DQS6
M_A_DQS#6
M_B_DQ7
B15
AK17
M_B_DQS6
MA_DATA8
MA_DQS_H6
MB_DATA7
MB_DQS_H6
M_A_DQ7
M_A_DQ6
M_B_DQ6
M_B_DQS#6
G16
AG19
A14
AJ17
M_A_DQS[7..0]
9
MA_DATA7
MA_DQS_L6
MB_DATA6
MB_DQS_L6
M_A_DQS5
M_A_DQS4
M_B_DQ5
M_B_DQ4
M_B_DQS5
E15
AG24
E13
AK23
M_B_DQS#[7..0]
9
MA_DATA6
MA_DQS_H5
MB_DATA5
MB_DQS_H5
M_A_DQ5
M_A_DQ4
M_A_DQS#5
M_B_DQS#5
M_B_DQS#4
G13
AG25
F13
AL23
MA_DATA5
MA_DQS_L5
MB_DATA4
MB_DQS_L5
M_B_DQ3
M_B_DQ1
M_B_DQ0
M_B_DQS4
H13
AG27
C15
AL28
M_A_DQS#[7..0]
9
MA_DATA4
MA_DQS_H4
MB_DATA3
MB_DQS_H4
B
B
M_A_DQ3
M_A_DQS#4
M_B_DQ2
H17
AG28
A15
AL29
MA_DATA3
MA_DQS_L4
MB_DATA2
MB_DQS_L4
M_A_DQ2
M_A_DQS3
M_B_DQS3
E16
D29
A13
D31
MA_DATA2
MA_DQS_H3
MB_DATA1
MB_DQS_H3
M_A_DQ1
M_A_DQ0
M_A_DQS#3
M_B_DQS#3
E14
C29
D13
C31
MA_DATA1
MA_DQS_L3
MB_DATA0
MB_DQS_L3
M_A_DQS2
M_A_DQS#2
M_B_DQS2
G14
C25
C24
MA_DATA0
MA_DQS_H2
MB_DQS_H2
M_B_DQS#2
D25
J31
C23
MA_DQS_L2
MB_DQS_H8
MB_DQS_L2
M_A_DQS1
M_A_DQS0
M_B_DQS1
J28
E19
J30
D17
MA_DQS_H8
MA_DQS_H1
MB_DQS_L8
MB_DQS_H1
M_A_DQS#1
M_A_DQS#0
M_B_DQS#1
J27
F19
C17
MA_DQS_L8
MA_DQS_L1
MB_DQS_L1
M_B_DQS0
F15
J29
C14
MA_DQS_H0
MB_DM8
MB_DQS_H0
M_B_DQS#0
J25
G15
C13
MA_DM8
MA_DQS_L0
MB_DQS_L0
M_B_DM7
K29
AJ14
MB_CHECK7
MB_DM7
M_A_DM7
M_B_DM6
K25
AF15
K31
AH17
M_B_DM[7..0]
9
MA_CHECK7
MA_DM7
MB_CHECK6
MB_DM6
M_A_DM6
M_B_DM5
J26
AF19
G30
AJ23
MA_CHECK6
MA_DM6
MB_CHECK5
MB_DM5
M_A_DM5
M_A_DM4
M_B_DM4
G28
AJ25
G29
AK29
M_A_DM[7..0]
9
MA_CHECK5
MA_DM5
MB_CHECK4
MB_DM4
M_B_DM3
G27
AH29
L29
C30
MA_CHECK4
MA_DM4
MB_CHECK3
MB_DM3
M_A_DM3
M_A_DM1
M_B_DM2
L24
B29
L28
A23
MA_CHECK3
MA_DM3
MB_CHECK2
MB_DM2
M_A_DM2
M_B_DM1
K27
E24
H31
B17
MA_CHECK2
MA_DM2
MB_CHECK1
MB_DM1
M_B_DM0
H29
E18
G31
B13
MA_CHECK1
MA_DM1
MB_CHECK0
MB_DM0
H27
H15
M_A_DM0
MA_CHECK0
MA_DM0
SKT-CPU940P-1-GP
SKT-CPU940P-1-GP
62.10040.151
62.10040.151
SKT-CPU940P-1-GP
SKT-CPU940P-1-GP
62.10040.151
62.10040.151
<Core Design>
<Core Design>
<Core Design>
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU(2/4)_DDR
CPU(2/4)_DDR
CPU(2/4)_DDR
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
A3
A3
A3
Yukon
Yukon
Yukon
SA
SA
SA
Date:
Date:
Date:
Thursday, July 03, 2008
Thursday, July 03, 2008
Thursday, July 03, 2008
Sheet
Sheet
Sheet
5
5
5
of
of
of
43
43
43
5
4
3
2
1
Plik z chomika:
joseeph
Inne pliki z tego folderu:
Wistron D-Note_IBM X30.pdf
(1206 KB)
Wistron jm41_jm51_-2_final.pdf
(502 KB)
Wistron (D)H2 rev.-4.pdf
(1320 KB)
Wistron (UNKNOWN).pdf
(1672 KB)
Wistron 1846.pdf
(1037 KB)
Inne foldery tego chomika:
acer
Amtek iTablet T01
Apple
Arima
asus
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